diff options
author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2011-04-18 23:51:12 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2011-04-18 23:51:12 +0000 |
commit | b3ae1867d1a4b495a56078f521bebec9981f7494 (patch) | |
tree | 5f05b92696c5b38932c0bacfb00f5aff285d83f3 /src/mainboard/amd/pistachio | |
parent | 261f842c1c3ce5e4ee151889f692a16856c400f3 (diff) | |
download | coreboot-b3ae1867d1a4b495a56078f521bebec9981f7494.tar.xz |
* Set USBDEBUG_DEFAULT_PORT in all southbridges and use that value
to unify calls to *_enable_usbdebug()
* rename *_enable_usbdebug() to enable_usbdebug()
* move enable_usbdebug() to generic romstage console init code
and drop it from the individual romstage.c files.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6513 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/pistachio')
-rw-r--r-- | src/mainboard/amd/pistachio/romstage.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c index 08cf32775e..6627d747e2 100644 --- a/src/mainboard/amd/pistachio/romstage.c +++ b/src/mainboard/amd/pistachio/romstage.c @@ -91,11 +91,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) * and it doesn't require any special setup. */ uart_init(); -#if CONFIG_USBDEBUG - sb600_enable_usbdebug(0); - early_usbdebug_init(); -#endif - console_init(); post_code(0x03); |