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author | Myles Watson <mylesgw@gmail.com> | 2010-09-10 18:33:24 +0000 |
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committer | Myles Watson <mylesgw@gmail.com> | 2010-09-10 18:33:24 +0000 |
commit | 6ea2115ceae9d426f293b029f305e61a01346640 (patch) | |
tree | 13ac5430e7442060dc6e97956a015fe04ab1d1d0 /src/mainboard/amd/pistachio | |
parent | 17daf9a941e1c5653a84ba651b21815404f2b4b5 (diff) | |
download | coreboot-6ea2115ceae9d426f293b029f305e61a01346640.tar.xz |
Move memory type information out of some AMD sockets.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5800 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/pistachio')
-rw-r--r-- | src/mainboard/amd/pistachio/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/amd/pistachio/Kconfig b/src/mainboard/amd/pistachio/Kconfig index f0f8b25e80..94c714c8f7 100644 --- a/src/mainboard/amd/pistachio/Kconfig +++ b/src/mainboard/amd/pistachio/Kconfig @@ -4,6 +4,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_X86 select CPU_AMD_SOCKET_AM2 + select DIMM_DDR2 select NORTHBRIDGE_AMD_AMDK8 select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select SOUTHBRIDGE_AMD_RS690 |