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| author | Patrick Georgi <patrick.georgi@secunet.com> | 2011-01-27 07:39:38 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2011-01-27 07:39:38 +0000 |
| commit | a470019b7a19e164b5dc93b1d541dc4158edbeda (patch) | |
| tree | 48156b3fb7f795cbe3241f787b642460aa03a29d /src/mainboard/amd/pistachio | |
| parent | a5c949eff288af3eb4caffec57a3724c497150de (diff) | |
| download | coreboot-a470019b7a19e164b5dc93b1d541dc4158edbeda.tar.xz | |
Add a new CMOS variable which triggers activation of the
LPT port. With the CMOS variable set, LPT is found by SeaBIOS,
with the variable reset, it's not.
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6302 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/pistachio')
0 files changed, 0 insertions, 0 deletions