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| author | Tobias Diedrich <ranma+coreboot@tdiedrich.de> | 2010-10-26 22:40:16 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-26 22:40:16 +0000 |
| commit | b907d321a5d0957f5cbb03d8f9c8d0ff0c23523b (patch) | |
| tree | ed994a792d00c4e97d85a2137a9f16f82c600a83 /src/mainboard/amd/pistachio | |
| parent | 4a8d9938b24e54321b9b68e56af5ea4437cf65d5 (diff) | |
| download | coreboot-b907d321a5d0957f5cbb03d8f9c8d0ff0c23523b.tar.xz | |
We need to call smp_write_lintsrc() instead of smp_write_intsrc() for
local ints. This is wrong in most coreboot mptables, probably all
generated by util/mptable/mptable.c.
After fixing this now XP can boot in MPS mode on my M2V.
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5992 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/pistachio')
| -rw-r--r-- | src/mainboard/amd/pistachio/mptable.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/amd/pistachio/mptable.c b/src/mainboard/amd/pistachio/mptable.c index f007569765..9f3ffa8797 100644 --- a/src/mainboard/amd/pistachio/mptable.c +++ b/src/mainboard/amd/pistachio/mptable.c @@ -100,7 +100,7 @@ static void *smp_write_config_table(void *v) /* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ #define IO_LOCAL_INT(type, intr, apicid, pin) \ - smp_write_intsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin)); + smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin)); mptable_add_isa_interrupts(mc, bus_isa, apicid_sb600, 0); |