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| author | Patrick Georgi <patrick@georgi-clan.de> | 2010-11-20 10:31:00 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-11-20 10:31:00 +0000 |
| commit | 9bd9a90d6a0a47ede6286e2c5599ae7335e4b96a (patch) | |
| tree | 325b7b6abc1d4514d52ad1f726d9be4fa00d0454 /src/mainboard/amd/pistachio | |
| parent | 622824cadbbbe003bc3e8c97694d2cf6bae0de9b (diff) | |
| download | coreboot-9bd9a90d6a0a47ede6286e2c5599ae7335e4b96a.tar.xz | |
Unify DIMM SPD addressing. For Geode, change the
addressing scheme to match the rest of the tree
(0x50 instead of 0xa0).
abuild tested.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/pistachio')
| -rw-r--r-- | src/mainboard/amd/pistachio/romstage.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c index 740b148f7e..f1f61c3d0c 100644 --- a/src/mainboard/amd/pistachio/romstage.c +++ b/src/mainboard/amd/pistachio/romstage.c @@ -17,9 +17,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define DIMM0 0x50 -#define DIMM1 0x51 - #include <stdint.h> #include <string.h> #include <device/pci_def.h> @@ -39,6 +36,7 @@ #include "northbridge/amd/amdk8/reset_test.c" #include "superio/ite/it8712f/it8712f_early_serial.c" #include <usbdebug.h> +#include <spd.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" |