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authorEric Biederman <ebiederm@xmission.com>2003-09-01 23:17:58 +0000
committerEric Biederman <ebiederm@xmission.com>2003-09-01 23:17:58 +0000
commit9bdb460a97e87b11167ef22ec2fb737ecb95aa41 (patch)
treeec82f54e42f3d031d151a9724cec733801543d87 /src/mainboard/amd/quartet
parent0e97fe39048fb9ed22f12dfc9d197de2f0b35631 (diff)
downloadcoreboot-9bdb460a97e87b11167ef22ec2fb737ecb95aa41.tar.xz
- Updates to config.g so that it works more reliably and has initial support
for paths - Renamed some configuration variables SMP -> CONFIG_SMP MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS - Removed some dead configuration variables MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS SMP -> CONFIG_SMP FINAL_MAINBOARD_FIXUP SIO_BASE SIO_SYSTEM_CLK_INPUT NO_KEYBOARD USE_NORMAL_IMAGE SERIAL_CONSOLE USE_ELF_BOOT ENABLE_FIXED_AND_VARIABLE_MTRRS START_CPU_SEG DISABLE_WATCHDOG ENABLE_IOMMU AMD8111_DEV - Removed some assembly files that are no longer needed killed src/southbridge/amd/amd8111/smbus.inc killed src/southbrideg/amd/amd8111/cmos_boot_failover.inc killed src/ram/ramtest.inc - Updates to config.g so that it works more reliably and has initial support for paths - Renamed some configuration variables SMP -> CONFIG_SMP MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS - Removed some dead configuration variables MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS SMP -> CONFIG_SMP FINAL_MAINBOARD_FIXUP SIO_BASE SIO_SYSTEM_CLK_INPUT NO_KEYBOARD USE_NORMAL_IMAGE SERIAL_CONSOLE USE_ELF_BOOT ENABLE_FIXED_AND_VARIABLE_MTRRS START_CPU_SEG DISABLE_WATCHDOG ENABLE_IOMMU AMD8111_DEV - Removed some assembly files that are no longer needed killed src/southbridge/amd/amd8111/smbus.inc killed src/southbrideg/amd/amd8111/cmos_boot_failover.inc killed src/ram/ramtest.inc killed src/sdram/generic_dump_spd.inc killed src/sdram/generic_dump_spd.inc - Updated the arima/hdama to build with the new configuration system - Updated config.g to list all of the variables with make echo git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/quartet')
-rw-r--r--src/mainboard/amd/quartet/Config.lb35
-rw-r--r--src/mainboard/amd/quartet/auto.c2
-rw-r--r--src/mainboard/amd/quartet/mainboard.c2
3 files changed, 7 insertions, 32 deletions
diff --git a/src/mainboard/amd/quartet/Config.lb b/src/mainboard/amd/quartet/Config.lb
index 97634ab25a..b6d65b4cb5 100644
--- a/src/mainboard/amd/quartet/Config.lb
+++ b/src/mainboard/amd/quartet/Config.lb
@@ -1,8 +1,6 @@
uses HAVE_MP_TABLE
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
-uses USE_NORMAL_IMAGE
-uses ENABLE_IOMMU
#
#
###
@@ -34,15 +32,11 @@ ldscript /cpu/i386/entry32.lds
### Build our reset vector (This is where linuxBIOS is entered)
###
if USE_FALLBACK_IMAGE
- mainboardinit cpu/i386/reset16.inc
- ldscript /cpu/i386/reset16.lds
+ mainboardinit cpu/i386/reset16.inc
+ ldscript /cpu/i386/reset16.lds
else
- print "NO FALLBACK USED!"
-end
-
-if USE_NORMAL_IMAGE
- mainboardinit cpu/i386/reset32.inc
- ldscript /cpu/i386/reset32.lds
+ mainboardinit cpu/i386/reset32.inc
+ ldscript /cpu/i386/reset32.lds
end
#
#### Should this be in the northbridge code?
@@ -76,15 +70,6 @@ end
mainboardinit cpu/k8/earlymtrr.inc
#
#
-###
-### Only the bootstrap cpu makes it here.
-### Failover if we need to
-###
-#
-if USE_FALLBACK_IMAGE
- mainboardinit southbridge/amd/amd8111/cmos_boot_failover.inc
-end
-#
####
#### O.k. We aren't just an intermediary anymore!
####
@@ -94,10 +79,6 @@ end
###
##option MAXIMUM_CONSOLE_LOGLEVEL=7
#default MAXIMUM_CONSOLE_LOGLEVEL=7
-#option DISABLE_WATCHDOG= (MAXIMUM_CONSOLE_LOGLEVEL >= 8)
-#if DISABLE_WATCHDOG
-# mainboardinit southbridgeamd/amd8111/disable_watchdog.inc
-#end
#
if USE_FALLBACK_IMAGE mainboardinit arch/i386/lib/noop_failover.inc end
#
@@ -118,13 +99,6 @@ end
mainboardinit ./auto.inc
#
###
-### Setup RAM
-###
-mainboardinit ram/ramtest.inc
-mainboardinit southbridge/amd/amd8111/smbus.inc
-mainboardinit sdram/generic_dump_spd.inc
-#
-###
### Include the secondary Configuration files
###
northbridge amd/amdk8
@@ -142,4 +116,3 @@ cpu p6 end
cpu k7 end
cpu k8 end
-option ENABLE_IOMMU=1
diff --git a/src/mainboard/amd/quartet/auto.c b/src/mainboard/amd/quartet/auto.c
index a347f20b70..3166f7ad3c 100644
--- a/src/mainboard/amd/quartet/auto.c
+++ b/src/mainboard/amd/quartet/auto.c
@@ -17,6 +17,8 @@
#include "northbridge/amd/amdk8/reset_test.c"
#include "debug.c"
+#define SIO_BASE 0x2e
+
static void memreset_setup(void)
{
/* Set the memreset low */
diff --git a/src/mainboard/amd/quartet/mainboard.c b/src/mainboard/amd/quartet/mainboard.c
index d93d2ed1d9..0622150d64 100644
--- a/src/mainboard/amd/quartet/mainboard.c
+++ b/src/mainboard/amd/quartet/mainboard.c
@@ -5,7 +5,7 @@
#include <device/pci_ops.h>
-unsigned long initial_apicid[MAX_CPUS] =
+unsigned long initial_apicid[CONFIG_MAX_CPUS] =
{
0, 1, 2, 3
};