Fall back to pre-broken settings and setup for GX2.

We lost a few things, but this is still worth it.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2287 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 20 insertions, 0 deletions

diff --git a/src/mainboard/amd/rumba/auto.c b/src/mainboard/amd/rumba/auto.c
index fbc272ffd0..b3a9b839ee 100644
--- a/src/mainboard/amd/rumba/auto.c
+++ b/src/mainboard/amd/rumba/auto.c
@@ -102,6 +102,22 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
 #include "northbridge/amd/gx2/pll_reset.c"
 #include "cpu/amd/model_gx2/cpureginit.c"
 #include "cpu/amd/model_gx2/syspreinit.c"
+static void msr_init(void)
+{
+	/* total physical memory */
+	__builtin_wrmsr(0x1808,  0x10f3bf00, 0x22fffc02);
+
+	/* traditional memory 0kB-512kB, 512kB-1MB */
+	__builtin_wrmsr(0x10000020, 0xfff80, 0x20000000);
+        __builtin_wrmsr(0x10000021, 0x80fffe0, 0x20000000);
+
+        __builtin_wrmsr(0x40000020, 0xfff80, 0x20000000);
+        __builtin_wrmsr(0x40000021, 0x80fffe0, 0x20000000);
+
+	/* put code in northbridge[init].c here */
+}
+
+
 static void main(unsigned long bist)
 {
 	static const struct mem_controller memctrl [] = {
@@ -109,6 +125,8 @@ static void main(unsigned long bist)
 	};
 
 	SystemPreInit();
+	
+
 	w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE);
 	uart_init();
 	console_init();
@@ -122,6 +140,8 @@ static void main(unsigned long bist)
 	
 	sdram_initialize(1, memctrl);
 
+	msr_init();
+
 	/* Check all of memory */
 	//ram_check(0x00000000, 640*1024);
 }