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authorStefan Reinauer <reinauer@chromium.org>2013-05-06 16:56:37 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-05-08 19:14:21 +0200
commit3949e3783409ec1ddda25116d06da2a7e16c6c51 (patch)
tree39b096ba8c28fd2595b0d5c843bb3bf11d6916a3 /src/mainboard/amd/serengeti_cheetah
parent648d16679c5cf4f91c9f8b48ee77c6a9ada87523 (diff)
downloadcoreboot-3949e3783409ec1ddda25116d06da2a7e16c6c51.tar.xz
Drop CONFIG_AP_CODE_IN_CAR
This option has not been enabled on any board and was considered obsolete last time it was touched. If we need the functionality, let's fix this in a generic way instead of a K8 specific way. This was mostly a speedup hack back in the day. Change-Id: Ib1ca248c56a7f6e9d0c986c35d131d5f444de0d8 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/3211 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/amd/serengeti_cheetah')
-rw-r--r--src/mainboard/amd/serengeti_cheetah/Kconfig1
-rw-r--r--src/mainboard/amd/serengeti_cheetah/ap_romstage.c74
2 files changed, 0 insertions, 75 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah/Kconfig b/src/mainboard/amd/serengeti_cheetah/Kconfig
index 26fa45f2be..b26803e3ff 100644
--- a/src/mainboard/amd/serengeti_cheetah/Kconfig
+++ b/src/mainboard/amd/serengeti_cheetah/Kconfig
@@ -17,7 +17,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select LIFT_BSP_APIC_ID
- #select AP_CODE_IN_CAR
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select WAIT_BEFORE_CPUS_INIT
select HAVE_ACPI_TABLES
diff --git a/src/mainboard/amd/serengeti_cheetah/ap_romstage.c b/src/mainboard/amd/serengeti_cheetah/ap_romstage.c
deleted file mode 100644
index fa680fe3cc..0000000000
--- a/src/mainboard/amd/serengeti_cheetah/ap_romstage.c
+++ /dev/null
@@ -1,74 +0,0 @@
-#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
-#include "console/console.c"
-#include "lib/uart8250.c"
-#include "console/vtxprintf.c"
-
-#include <cpu/amd/model_fxx_rev.h>
-#include "northbridge/amd/amdk8/raminit.h"
-
-#include "lib/delay.c"
-
-#include "northbridge/amd/amdk8/reset_test.c"
-
-#include "northbridge/amd/amdk8/debug.c"
-
-#include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
-
-#include "northbridge/amd/amdk8/amdk8_f.h"
-
-#include "cpu/x86/mtrr.h"
-#include "cpu/amd/mtrr.h"
-#include "cpu/x86/tsc.h"
-
-#include "northbridge/amd/amdk8/amdk8_f_pci.c"
-#include "northbridge/amd/amdk8/raminit_f_dqs.c"
-
-static inline unsigned get_nodes(void)
-{
- return ((pci_read_config32(PCI_DEV(0, 0x18, 0), 0x60)>>4) & 7) + 1;
-}
-
-#include "cpu/amd/dualcore/dualcore.c"
-
-void hardwaremain(int ret_addr)
-{
- struct sys_info *sysinfo = &sysinfo_car; // in CACHE
- struct sys_info *sysinfox = ((CONFIG_RAMTOP) - sizeof(*sysinfox)); // in RAM
-
- struct node_core_id id;
-
- id = get_node_core_id_x();
-
- printk(BIOS_DEBUG, "CODE IN CACHE ON NODE: %02x\n", id.nodeid);
-
- train_ram(id.nodeid, sysinfo, sysinfox);
-
- /*
- * go back, but can not use stack any more, because we
- * only keep ret_addr and can not restore esp, and ebp.
- */
-
- __asm__ volatile (
- "movl %0, %%edi\n\t"
- "jmp *%%edi\n\t"
- :: "a"(ret_addr)
- );
-}
-
-#include <arch/registers.h>
-
-void x86_exception(struct eregs *info)
-{
- do {
- hlt();
- } while(1);
-}
-