mainboard/*/*/mptable.c: Improve code formatting

Change-Id: I341293cd334d6d465636db7e81400230d61bc693
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16723
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

1 files changed, 90 insertions, 90 deletions

diff --git a/src/mainboard/amd/serengeti_cheetah/mptable.c b/src/mainboard/amd/serengeti_cheetah/mptable.c
index acc4a6c68c..2ffe4c9070 100644
--- a/src/mainboard/amd/serengeti_cheetah/mptable.c
+++ b/src/mainboard/amd/serengeti_cheetah/mptable.c
@@ -25,15 +25,15 @@
 
 static void *smp_write_config_table(void *v)
 {
-        struct mp_config_table *mc;
+	struct mp_config_table *mc;
 	int i, j, bus_isa;
 	struct mb_sysconf_t *m;
 
-        mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
+	mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
 
 	mptable_init(mc, LOCAL_APIC_ADDR);
 
-        smp_write_processors(mc);
+	smp_write_processors(mc);
 
 	get_bus_conf();
 
@@ -43,54 +43,54 @@ static void *smp_write_config_table(void *v)
 
 /*I/O APICs:	APIC ID	Version	State		Address*/
 	smp_write_ioapic(mc, m->apicid_8111, 0x11, VIO_APIC_VADDR); //8111
-        {
-                device_t dev;
+	{
+		device_t dev;
 		struct resource *res;
-                dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3, 1));
-                if (dev) {
+		dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3, 1));
+		if (dev) {
 			res = find_resource(dev, PCI_BASE_ADDRESS_0);
 			if (res) {
 				smp_write_ioapic(mc, m->apicid_8132_1, 0x11,
 						 res2mmio(res, 0, 0));
 			}
-                }
-                dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3+1, 1));
-                if (dev) {
+		}
+		dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3+1, 1));
+		if (dev) {
 			res = find_resource(dev, PCI_BASE_ADDRESS_0);
 			if (res) {
 				smp_write_ioapic(mc, m->apicid_8132_2, 0x11,
 						 res2mmio(res, 0, 0));
 			}
-                }
+		}
 
-                j = 0;
+		j = 0;
 
-                for(i = 1; i< sysconf.hc_possible_num; i++) {
-                        if(!(sysconf.pci1234[i] & 0x1) ) continue;
+		for(i = 1; i< sysconf.hc_possible_num; i++) {
+			if(!(sysconf.pci1234[i] & 0x1) ) continue;
 
-                        switch(sysconf.hcid[i]) {
-                        case 1: // 8132
+			switch(sysconf.hcid[i]) {
+			case 1: // 8132
 			case 3: // 8131
-                                dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1));
-                                if (dev) {
-                                        res = find_resource(dev, PCI_BASE_ADDRESS_0);
-                                        if (res) {
-                                                smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11,
+				dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1));
+				if (dev) {
+					res = find_resource(dev, PCI_BASE_ADDRESS_0);
+					if (res) {
+						smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11,
 								 res2mmio(res, 0, 0));
-                                        }
-                                }
-                                dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1));
-                                if (dev) {
-                                        res = find_resource(dev, PCI_BASE_ADDRESS_0);
-                                        if (res) {
-                                                smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11,
+					}
+				}
+				dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1));
+				if (dev) {
+					res = find_resource(dev, PCI_BASE_ADDRESS_0);
+					if (res) {
+						smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11,
 								 res2mmio(res, 0, 0));
-                                        }
-                                }
-                                break;
-                        }
-                        j++;
-                }
+					}
+				}
+				break;
+			}
+			j++;
+		}
 
 	}
 
@@ -98,76 +98,76 @@ static void *smp_write_config_table(void *v)
 
 /*I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN# */
 //??? What
-        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_0, ((sysconf.sbdn+1)<<2)|3, m->apicid_8111, 0x13);
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_0, ((sysconf.sbdn+1)<<2)|3, m->apicid_8111, 0x13);
 
 // Onboard AMD USB
-        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (0 << 2)|3, m->apicid_8111, 0x13);
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (0 << 2)|3, m->apicid_8111, 0x13);
 
 //Slot 3  PCI 32
-        for(i = 0; i < 4; i++) {
-                smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (5 << 2)|i, m->apicid_8111, 0x10 + (1+i)%4); //16
-        }
+	for(i = 0; i < 4; i++) {
+		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (5 << 2)|i, m->apicid_8111, 0x10 + (1+i)%4); //16
+	}
 
 
 //Slot 4 PCI 32
-        for(i = 0; i < 4; i++) {
-                smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (4 << 2)|i, m->apicid_8111, 0x10 + (0+i)%4); //16
-        }
+	for(i = 0; i < 4; i++) {
+		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (4 << 2)|i, m->apicid_8111, 0x10 + (0+i)%4); //16
+	}
 
 
 //Slot 1 PCI-X 133/100/66
-        for(i = 0; i < 4; i++) {
-                smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_2, (1 << 2)|i, m->apicid_8132_2, (0+i)%4); //
-        }
+	for(i = 0; i < 4; i++) {
+		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_2, (1 << 2)|i, m->apicid_8132_2, (0+i)%4); //
+	}
 
 
 //Slot 2 PCI-X 133/100/66
-        for(i = 0; i < 4; i++) {
-                smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (1 << 2)|i, m->apicid_8132_1, (1+i)%4); //25
-        }
-
-        j = 0;
-
-        for(i = 1; i< sysconf.hc_possible_num; i++) {
-                if(!(sysconf.pci1234[i] & 0x1) ) continue;
-                int ii;
-                device_t dev;
-                struct resource *res;
-                switch(sysconf.hcid[i]) {
-                case 1:
+	for(i = 0; i < 4; i++) {
+		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (1 << 2)|i, m->apicid_8132_1, (1+i)%4); //25
+	}
+
+	j = 0;
+
+	for(i = 1; i< sysconf.hc_possible_num; i++) {
+		if(!(sysconf.pci1234[i] & 0x1) ) continue;
+		int ii;
+		device_t dev;
+		struct resource *res;
+		switch(sysconf.hcid[i]) {
+		case 1:
 		case 3:
-                        dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1));
-                        if (dev) {
-                                res = find_resource(dev, PCI_BASE_ADDRESS_0);
-                                if (res) {
-                                        //Slot 1 PCI-X 133/100/66
-                                        for(ii = 0; ii < 4; ii++) {
-                                                smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132a[j][1], (0 << 2)|ii, m->apicid_8132a[j][0], (0+ii)%4); //
-                                        }
-                                }
-                        }
-
-                        dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1));
-                        if (dev) {
-                                res = find_resource(dev, PCI_BASE_ADDRESS_0);
-                                if (res) {
-                                        //Slot 2 PCI-X 133/100/66
-                                        for(ii = 0; ii < 4; ii++) {
-                                                smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132a[j][2], (0 << 2)|ii, m->apicid_8132a[j][1], (0+ii)%4); //25
-                                        }
-                                }
-                        }
-
-                        break;
-                case 2:
-
-                //  Slot AGP
-                        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8151[j][1], 0x0, m->apicid_8111, 0x11);
-                        break;
-                }
-
-                j++;
-        }
+			dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1));
+			if (dev) {
+				res = find_resource(dev, PCI_BASE_ADDRESS_0);
+				if (res) {
+					//Slot 1 PCI-X 133/100/66
+					for(ii = 0; ii < 4; ii++) {
+						smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132a[j][1], (0 << 2)|ii, m->apicid_8132a[j][0], (0+ii)%4); //
+					}
+				}
+			}
+
+			dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1));
+			if (dev) {
+				res = find_resource(dev, PCI_BASE_ADDRESS_0);
+				if (res) {
+					//Slot 2 PCI-X 133/100/66
+					for(ii = 0; ii < 4; ii++) {
+						smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132a[j][2], (0 << 2)|ii, m->apicid_8132a[j][1], (0+ii)%4); //25
+					}
+				}
+			}
+
+			break;
+		case 2:
+
+		//  Slot AGP
+			smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8151[j][1], 0x0, m->apicid_8111, 0x11);
+			break;
+		}
+
+		j++;
+	}