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author | Kevin Paul Herbert <kph@meraki.net> | 2014-12-24 18:43:20 -0800 |
---|---|---|
committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-02-15 08:50:22 +0100 |
commit | bde6d309dfafe58732ec46314a2d4c08974b62d4 (patch) | |
tree | 17ba00565487ddfbb5759c96adfbb3fffe2a4550 /src/mainboard/amd/serengeti_cheetah | |
parent | 4b10dec1a66122b515b2191f823d7fd379ec655f (diff) | |
download | coreboot-bde6d309dfafe58732ec46314a2d4c08974b62d4.tar.xz |
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
On x86, change the type of the address parameter in
read8()/read16/read32()/write8()/write16()/write32() to be a
pointer, instead of unsigned long.
Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330
Signed-off-by: Kevin Paul Herbert <kph@meraki.net>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7784
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/amd/serengeti_cheetah')
-rw-r--r-- | src/mainboard/amd/serengeti_cheetah/mptable.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah/mptable.c b/src/mainboard/amd/serengeti_cheetah/mptable.c index 866875dc63..56df3fa4d6 100644 --- a/src/mainboard/amd/serengeti_cheetah/mptable.c +++ b/src/mainboard/amd/serengeti_cheetah/mptable.c @@ -29,7 +29,7 @@ static void *smp_write_config_table(void *v) mptable_write_buses(mc, NULL, &bus_isa); /*I/O APICs: APIC ID Version State Address*/ - smp_write_ioapic(mc, m->apicid_8111, 0x11, IO_APIC_ADDR); //8111 + smp_write_ioapic(mc, m->apicid_8111, 0x11, VIO_APIC_VADDR); //8111 { device_t dev; struct resource *res; @@ -37,14 +37,16 @@ static void *smp_write_config_table(void *v) if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { - smp_write_ioapic(mc, m->apicid_8132_1, 0x11, res->base); + smp_write_ioapic(mc, m->apicid_8132_1, 0x11, + res2mmio(res, 0, 0)); } } dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3+1, 1)); if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { - smp_write_ioapic(mc, m->apicid_8132_2, 0x11, res->base); + smp_write_ioapic(mc, m->apicid_8132_2, 0x11, + res2mmio(res, 0, 0)); } } @@ -60,14 +62,16 @@ static void *smp_write_config_table(void *v) if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { - smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11, res->base); + smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11, + res2mmio(res, 0, 0)); } } dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1)); if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { - smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11, res->base); + smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11, + res2mmio(res, 0, 0)); } } break; |