diff options
author | Myles Watson <mylesgw@gmail.com> | 2009-10-12 22:39:08 +0000 |
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committer | Myles Watson <mylesgw@gmail.com> | 2009-10-12 22:39:08 +0000 |
commit | 3db199c00a4c0b7986da98f2bc5504526c3a1cf2 (patch) | |
tree | b524d2d1b4fc9253c99dd55fca97c5894e867c8a /src/mainboard/amd/serengeti_cheetah_fam10/Kconfig | |
parent | b106f9bdbd02a7aafd7db0c198fc6a1112f1e412 (diff) | |
download | coreboot-3db199c00a4c0b7986da98f2bc5504526c3a1cf2.tar.xz |
Make fam10 build (but not boot due to bootblock size problems.)
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4762 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/serengeti_cheetah_fam10/Kconfig')
-rw-r--r-- | src/mainboard/amd/serengeti_cheetah_fam10/Kconfig | 59 |
1 files changed, 36 insertions, 23 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig index da4ea1faf2..1feca96edb 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig +++ b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig @@ -13,9 +13,8 @@ config BOARD_AMD_SERENGETI_CHEETAH_FAM10 select USE_DCACHE_RAM select HAVE_HARD_RESET select IOAPIC - select AP_CODE_IN_CAR select SB_HT_CHAIN_UNITID_OFFSET_ONLY - select WAIT_BEFORE_CPUS_INIT + select SERIAL_CPU_INIT select AMDMCT select HAVE_ACPI_TABLES @@ -24,24 +23,9 @@ config MAINBOARD_DIR default amd/serengeti_cheetah_fam10 depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 -config DCACHE_RAM_BASE - hex - default 0xc8000 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 - -config DCACHE_RAM_SIZE - hex - default 0x08000 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 - -config DCACHE_RAM_GLOBAL_VAR_SIZE - hex - default 0x01000 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 - config APIC_ID_OFFSET hex - default 0x8 + default 0x0 depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 config LB_CKS_RANGE_END @@ -100,11 +84,6 @@ config USE_INIT default n depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 -config SERIAL_CPU_INIT - bool - default n - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 - config IRQ_SLOT_COUNT int default 11 @@ -115,3 +94,37 @@ config AMD_UCODE_PATCH_FILE default "mc_patch_01000095.h" depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 +config LB_MEM_TOPK + hex + default 0x4000 + depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 + +config HEAP_SIZE + hex + default 0xc0000 + depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 + +config ACPI_SSDTX_NUM + int + default 31 + depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 + +config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID + hex + default 0x2b80 + depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 + +config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID + hex + default 0x1022 + depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 + +config ENABLE_APIC_EXT_ID + bool + default y + depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 + +config LIFT_BSP_APIC_ID + bool + default y + depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 |