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authorLi-Ta Lo <ollie@lanl.gov>2004-06-15 23:55:55 +0000
committerLi-Ta Lo <ollie@lanl.gov>2004-06-15 23:55:55 +0000
commit99efe80122395187dbb83b76980c4f0a7539bc3c (patch)
tree3c990d27649f1f780a8f74b96057b7389cf7d5c4 /src/mainboard/amd/solo/auto.c
parent6ae2ac37396e555041c382bef9d6ee060d2df542 (diff)
downloadcoreboot-99efe80122395187dbb83b76980c4f0a7539bc3c.tar.xz
add support for AMD Serenade mainboard, why we have phantom devices here?
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1607 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/solo/auto.c')
-rw-r--r--src/mainboard/amd/solo/auto.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/src/mainboard/amd/solo/auto.c b/src/mainboard/amd/solo/auto.c
index 93c21fcfdc..d893b5f8b7 100644
--- a/src/mainboard/amd/solo/auto.c
+++ b/src/mainboard/amd/solo/auto.c
@@ -102,20 +102,25 @@ static void main(void)
.channel1 = {0, 0, 0, 0},
}
};
+
int needs_reset;
enable_lapic();
init_timer();
+
if (cpu_init_detected()) {
asm("jmp __cpu_reset");
}
+
distinguish_cpu_resets();
if (!boot_cpu()) {
print_err("This LinuxBIOS image is built for UP only.\n");
stop_this_cpu();
}
+
pc87360_enable_serial(SERIAL_DEV, TTYS0_BASE);
uart_init();
console_init();
+
setup_default_resource_map();
needs_reset = setup_coherent_ht_domain();
needs_reset |= ht_setup_chain(PCI_DEV(0, 0x18, 0), 0x80);
@@ -123,20 +128,22 @@ static void main(void)
print_info("ht reset -\r\n");
soft_reset();
}
+
#if 0
print_pci_devices();
#endif
+
enable_smbus();
+
#if 0
dump_spd_registers(&cpu[0]);
#endif
+
memreset_setup();
sdram_initialize(sizeof(cpu) / sizeof(cpu[0]), cpu);
#if 0
dump_pci_devices();
-#endif
-#if 0
dump_pci_device(PCI_DEV(0, 0x18, 2));
#endif