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authorKimarie Hoot <kimarie.hoot@se-eng.com>2013-03-07 08:54:36 -0700
committerPaul Menzel <paulepanter@users.sourceforge.net>2013-03-08 22:16:30 +0100
commita2f8eb98f5dcc9551a6cfc0ce83eee3eb8fb564f (patch)
tree8d56d0573b320817a21b2557ea76838b42d37b7f /src/mainboard/amd/south_station/Makefile.inc
parentb21eaa74a656fa33f943f76ea0c53ca8374760f6 (diff)
downloadcoreboot-a2f8eb98f5dcc9551a6cfc0ce83eee3eb8fb564f.tar.xz
AMD South Station: Use SPD read code from F14 wrapper
Changes: - Get rid of the south_station mainboard specific code and use the platform generic function wrapper that was added in change http://review.coreboot.org/#/c/2497/ AMD f14: Add SPD read functions to wrapper code - Move DIMM addresses into devicetree.cb - Add the ASF init that used to be in the SPD read code into mainboard_enable() Notes: - The DIMM reads only happen in romstage, so the function is not available in ramstage. Point the read-SPD callback to a generic function in ramstage. Change-Id: If4291d25ea81bf375f55b64c07c223a847a211d0 Signed-off-by: Kimarie Hoot <kimarie.hoot@se-eng.com> Reviewed-on: http://review.coreboot.org/2608 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martin.roth@se-eng.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/amd/south_station/Makefile.inc')
-rw-r--r--src/mainboard/amd/south_station/Makefile.inc2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/amd/south_station/Makefile.inc b/src/mainboard/amd/south_station/Makefile.inc
index 50f9447003..59c6cd0ff8 100644
--- a/src/mainboard/amd/south_station/Makefile.inc
+++ b/src/mainboard/amd/south_station/Makefile.inc
@@ -19,13 +19,11 @@
romstage-y += buildOpts.c
romstage-y += agesawrapper.c
-romstage-y += dimmSpd.c
romstage-y += BiosCallOuts.c
romstage-y += PlatformGnbPcie.c
ramstage-y += buildOpts.c
ramstage-y += agesawrapper.c
-ramstage-y += dimmSpd.c
ramstage-y += BiosCallOuts.c
ramstage-y += PlatformGnbPcie.c