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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-03-04 07:50:49 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-25 20:32:27 +0000 |
| commit | 6fbf23efc23dcd4a2512759381c24feebf0ed6bf (patch) | |
| tree | c68cd3e2ec0e190afcf2658e540950c2292ad49d /src/mainboard/amd/south_station/OemCustomize.c | |
| parent | 7d4dca51ee426924ec4d708ff3fde93008339f3a (diff) | |
| download | coreboot-6fbf23efc23dcd4a2512759381c24feebf0ed6bf.tar.xz | |
amd/south_station: Switch away from AGESA_LEGACY
Change-Id: I09fe0e903a1241212f81e2a897898356a7e372a9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/19174
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/amd/south_station/OemCustomize.c')
| -rw-r--r-- | src/mainboard/amd/south_station/OemCustomize.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/amd/south_station/OemCustomize.c b/src/mainboard/amd/south_station/OemCustomize.c index 74b0aa8e17..a631eb0762 100644 --- a/src/mainboard/amd/south_station/OemCustomize.c +++ b/src/mainboard/amd/south_station/OemCustomize.c @@ -16,7 +16,7 @@ #include "PlatformGnbPcieComplex.h" #include <string.h> -#include <northbridge/amd/agesa/agesawrapper.h> +#include <northbridge/amd/agesa/state_machine.h> #include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h> #include <PlatformMemoryConfiguration.h> @@ -38,7 +38,7 @@ **/ /*---------------------------------------------------------------------------------------*/ -static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly) +void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly) { AGESA_STATUS Status; VOID *BrazosPcieComplexListPtr; @@ -134,7 +134,6 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = { InitEarly->GnbConfig.PcieComplexList = BrazosPcieComplexListPtr; InitEarly->GnbConfig.PsppPolicy = 0; - return AGESA_SUCCESS; } /*---------------------------------------------------------------------------------------- @@ -148,12 +147,13 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = { * is populated, AGESA will base its settings on the data from the table. Otherwise, it will * use its default conservative settings. */ -CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { +static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = { NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 2), NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 1), PSO_END }; -const struct OEM_HOOK OemCustomize = { - .InitEarly = OemInitEarly, -}; +void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost) +{ + InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable; +} |