diff options
author | Kimarie Hoot <kimarie.hoot@se-eng.com> | 2013-03-07 08:54:36 -0700 |
---|---|---|
committer | Paul Menzel <paulepanter@users.sourceforge.net> | 2013-03-08 22:16:30 +0100 |
commit | a2f8eb98f5dcc9551a6cfc0ce83eee3eb8fb564f (patch) | |
tree | 8d56d0573b320817a21b2557ea76838b42d37b7f /src/mainboard/amd/south_station/mainboard.c | |
parent | b21eaa74a656fa33f943f76ea0c53ca8374760f6 (diff) | |
download | coreboot-a2f8eb98f5dcc9551a6cfc0ce83eee3eb8fb564f.tar.xz |
AMD South Station: Use SPD read code from F14 wrapper
Changes:
- Get rid of the south_station mainboard specific code and
use the platform generic function wrapper that was added
in change http://review.coreboot.org/#/c/2497/
AMD f14: Add SPD read functions to wrapper code
- Move DIMM addresses into devicetree.cb
- Add the ASF init that used to be in the SPD read code into
mainboard_enable()
Notes:
- The DIMM reads only happen in romstage, so the function is not
available in ramstage. Point the read-SPD callback to a generic
function in ramstage.
Change-Id: If4291d25ea81bf375f55b64c07c223a847a211d0
Signed-off-by: Kimarie Hoot <kimarie.hoot@se-eng.com>
Reviewed-on: http://review.coreboot.org/2608
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/amd/south_station/mainboard.c')
-rw-r--r-- | src/mainboard/amd/south_station/mainboard.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/mainboard/amd/south_station/mainboard.c b/src/mainboard/amd/south_station/mainboard.c index 83b4b38bfe..43d6a788a9 100644 --- a/src/mainboard/amd/south_station/mainboard.c +++ b/src/mainboard/amd/south_station/mainboard.c @@ -22,6 +22,7 @@ #include <device/pci.h> #include <arch/io.h> #include <cpu/x86/msr.h> +#include <southbridge/amd/sb800/sb800.h> #include <cpu/amd/mtrr.h> #include <device/pci_def.h> #include <delay.h> @@ -80,6 +81,15 @@ static void mainboard_enable(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); southstation_led_init(); + + /* + * Initialize ASF registers to an arbitrary address because someone + * long ago set things up this way inside the SPD read code. The + * SPD read code has been made generic and moved out of the board + * directory, so the ASF init is being done here. + */ + pm_iowrite(0x29, 0x80); + pm_iowrite(0x28, 0x61); } struct chip_operations mainboard_ops = { |