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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-03-04 07:50:54 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-08-24 10:31:50 +0000
commitacc8ac649d1cf8a35e3407b8ca055aef9e9371b0 (patch)
tree7d9b6ec12e05c8d786fae2047255020f5bb1eb5e /src/mainboard/amd/thatcher/OemCustomize.c
parent46379c74ad829863a616e0d35aeea9c7fd344c33 (diff)
downloadcoreboot-acc8ac649d1cf8a35e3407b8ca055aef9e9371b0.tar.xz
amd/thatcher: Switch away from AGESA_LEGACY
Change-Id: I7194eb910cccc454c5f20c23629ff2a45b1a9079 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/20719 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/amd/thatcher/OemCustomize.c')
-rw-r--r--src/mainboard/amd/thatcher/OemCustomize.c35
1 files changed, 20 insertions, 15 deletions
diff --git a/src/mainboard/amd/thatcher/OemCustomize.c b/src/mainboard/amd/thatcher/OemCustomize.c
index 66058f2a4c..3f2563b606 100644
--- a/src/mainboard/amd/thatcher/OemCustomize.c
+++ b/src/mainboard/amd/thatcher/OemCustomize.c
@@ -20,7 +20,7 @@
#include <PlatformMemoryConfiguration.h>
#include "Filecode.h"
-#include <northbridge/amd/agesa/agesawrapper.h>
+#include <northbridge/amd/agesa/state_machine.h>
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
@@ -147,6 +147,13 @@ static const PCIe_COMPLEX_DESCRIPTOR Trinity = {
&DdiList[0]
};
+void board_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset)
+{
+ FCH_RESET_INTERFACE *FchReset = &Reset->FchInterface;
+ FchReset->Xhci0Enable = FALSE;
+ FchReset->Xhci1Enable = FALSE;
+}
+
/*---------------------------------------------------------------------------------------*/
/**
* OemCustomizeInitEarly
@@ -163,7 +170,7 @@ static const PCIe_COMPLEX_DESCRIPTOR Trinity = {
**/
/*---------------------------------------------------------------------------------------*/
-static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly)
+void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly)
{
AGESA_STATUS Status;
VOID *TrinityPcieComplexListPtr;
@@ -215,14 +222,6 @@ static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly)
((PCIe_COMPLEX_DESCRIPTOR*)TrinityPcieComplexListPtr)->DdiLinkList = (PCIe_DDI_DESCRIPTOR*)TrinityPcieDdiPtr;
InitEarly->GnbConfig.PcieComplexList = TrinityPcieComplexListPtr;
- return AGESA_SUCCESS;
-}
-
-static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid)
-{
- /* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */
- InitMid->GnbMidConfiguration.iGpuVgaMode = 0;
- return AGESA_SUCCESS;
}
/*----------------------------------------------------------------------------------------
@@ -236,7 +235,7 @@ static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid)
* is populated, AGESA will base its settings on the data from the table. Otherwise, it will
* use its default conservative settings.
*/
-CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
+static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = {
NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 1),
NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2),
MEMCLK_DIS_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
@@ -247,7 +246,13 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
PSO_END
};
-const struct OEM_HOOK OemCustomize = {
- .InitEarly = OemInitEarly,
- .InitMid = OemInitMid,
-};
+void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost)
+{
+ InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable;
+}
+
+void board_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *InitMid)
+{
+ /* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */
+ InitMid->GnbMidConfiguration.iGpuVgaMode = 0;
+}