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author | Angel Pons <th3fanbus@gmail.com> | 2020-07-08 01:46:32 +0200 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-09 23:55:06 +0000 |
commit | dd1da42f857ea7e18af4a8cc7cb283ec88e16549 (patch) | |
tree | d725a99a6cc7fb011e6e70dcda704c1fa3ca49e2 /src/mainboard/amd/thatcher/acpi | |
parent | e70d1d4b588d9b483fec9f9a85c33d367fed4e78 (diff) | |
download | coreboot-dd1da42f857ea7e18af4a8cc7cb283ec88e16549.tar.xz |
ACPI: Drop commented-out DSDT DefinitionBlock instances
This code is not even being build-tested. Drop it before it grows moss.
Change-Id: I9b5589d4596eead83a5897b083ccb85ef05a03d5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43270
Reviewed-by: Michael Niewöhner
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/amd/thatcher/acpi')
-rw-r--r-- | src/mainboard/amd/thatcher/acpi/cpstate.asl | 27 |
1 files changed, 0 insertions, 27 deletions
diff --git a/src/mainboard/amd/thatcher/acpi/cpstate.asl b/src/mainboard/amd/thatcher/acpi/cpstate.asl index 2a0372e992..494fc73201 100644 --- a/src/mainboard/amd/thatcher/acpi/cpstate.asl +++ b/src/mainboard/amd/thatcher/acpi/cpstate.asl @@ -5,33 +5,6 @@ * core. It assumes that each core of the system has the same performance * characteristics. */ -/* -#include <acpi/acpi.h> -DefinitionBlock ("DSDT.AML", "DSDT", 0x01, OEM_ID, ACPI_TABLE_CREATOR, 0x00010001) - { - Scope (\_SB) { - Device (CPU0) { - Name (_HID, "ACPI0007") - Name (_UID, 0) - #include "cpstate.asl" - } - Device (CPU1) { - Name (_HID, "ACPI0007") - Name (_UID, 1) - #include "cpstate.asl" - } - Device (CPU2) { - Name (_HID, "ACPI0007") - Name (_UID, 2) - #include "cpstate.asl" - } - Device (CPU3) { - Name (_HID, "ACPI0007") - Name (_UID, 3) - #include "cpstate.asl" - } - } -*/ /* P-state support: The maximum number of P-states supported by the */ /* CPUs we'll use is 6. */ /* Get from AMI BIOS. */ |