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| author | efdesign98 <efdesign98@gmail.com> | 2011-08-19 14:25:48 -0600 |
|---|---|---|
| committer | Marc Jones <marcj303@gmail.com> | 2011-09-15 17:30:07 +0200 |
| commit | 2c66060169b5e1718406f58d1d7a270aea7b1b73 (patch) | |
| tree | 035369c66f187f9cf6ba7350923733e2473d8adb /src/mainboard/amd/torpedo/BiosCallOuts.c | |
| parent | 4d2d5d5b3e661683ab209d068ab7537332fe15f9 (diff) | |
| download | coreboot-2c66060169b5e1718406f58d1d7a270aea7b1b73.tar.xz | |
AMD Torpedo platform updates
This update fixes warnings and supports as necessary
the Agesa infrastructure changes required to support
the AMD Family 14 cpu update to rev C0.
Change-Id: Ib08b49695b925b81f796bf299141fe6f845fdef8
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Reviewed-on: http://review.coreboot.org/138
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/mainboard/amd/torpedo/BiosCallOuts.c')
| -rwxr-xr-x | src/mainboard/amd/torpedo/BiosCallOuts.c | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/src/mainboard/amd/torpedo/BiosCallOuts.c b/src/mainboard/amd/torpedo/BiosCallOuts.c index bd6c633c65..355077f189 100755 --- a/src/mainboard/amd/torpedo/BiosCallOuts.c +++ b/src/mainboard/amd/torpedo/BiosCallOuts.c @@ -539,25 +539,30 @@ AGESA_STATUS BiosHookBeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr) Data16 |= Data8; AcpiMmioAddr = (UINT32)Data16 << 16; GpioMmioAddr = AcpiMmioAddr + GPIO_BASE; - if(MemData->ParameterListPtr->DDR3Voltage == VOLT1_5) { - Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178); - Data8 |= BIT6; - Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8); - } else if(MemData->ParameterListPtr->DDR3Voltage == VOLT1_35) { + + switch(MemData->ParameterListPtr->DDR3Voltage){ + case VOLT1_35: Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178); Data8 &= ~(UINT8)BIT6; Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8); Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179); - Data8 |= BIT6; + Data8 |= (UINT8)BIT6; Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8); - } else if(MemData->ParameterListPtr->DDR3Voltage == VOLT1_25) { + break; + case VOLT1_25: Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178); Data8 &= ~(UINT8)BIT6; Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8); Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179); Data8 &= ~(UINT8)BIT6; Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8); - } else {} + break; + case VOLT1_5: + default: + Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178); + Data8 |= (UINT8)BIT6; + Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8); + } return Status; } |