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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2014-07-21 08:07:19 +0200 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2014-07-24 12:43:01 +0200 |
| commit | aedcc10ad30f3fcc1397035876672d235418393f (patch) | |
| tree | b65ec6f8e964ba7cbd6866cc54e1cc415072c05c /src/mainboard/amd/torpedo | |
| parent | 643646075019816c6ae441f613426caaf7b0bd2e (diff) | |
| download | coreboot-aedcc10ad30f3fcc1397035876672d235418393f.tar.xz | |
src/mainboard: Remove trailing whitespace
Change-Id: I14a9dc99acb5d5365a3d7e99a3964120bb611b05
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/6308
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/amd/torpedo')
| -rw-r--r-- | src/mainboard/amd/torpedo/buildOpts.c | 4 | ||||
| -rw-r--r-- | src/mainboard/amd/torpedo/romstage.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/amd/torpedo/buildOpts.c b/src/mainboard/amd/torpedo/buildOpts.c index 8b34720633..31d1fefef7 100644 --- a/src/mainboard/amd/torpedo/buildOpts.c +++ b/src/mainboard/amd/torpedo/buildOpts.c @@ -34,8 +34,8 @@ */ #include <stdlib.h> -#include "AGESA.h" -#include "CommonReturns.h" +#include "AGESA.h" +#include "CommonReturns.h" #include "Filecode.h" #define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE diff --git a/src/mainboard/amd/torpedo/romstage.c b/src/mainboard/amd/torpedo/romstage.c index febe1204ba..7ed520a9bc 100644 --- a/src/mainboard/amd/torpedo/romstage.c +++ b/src/mainboard/amd/torpedo/romstage.c @@ -68,8 +68,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // Load MPB val = cpuid_eax(1); - printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val); - printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx); + printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val); + printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx); post_code(0x36); AGESAWRAPPER(amdinitreset); |