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| author | Kimarie Hoot <kimarie.hoot@se-eng.com> | 2013-03-07 09:10:29 -0700 |
|---|---|---|
| committer | Paul Menzel <paulepanter@users.sourceforge.net> | 2013-03-08 22:18:50 +0100 |
| commit | 9ca4f51bd441638f177a18a744c78c3655988a4d (patch) | |
| tree | 53247a3a33c5cb04a982ba71650262e8b2d3a463 /src/mainboard/amd/union_station/mainboard.c | |
| parent | a2f8eb98f5dcc9551a6cfc0ce83eee3eb8fb564f (diff) | |
| download | coreboot-9ca4f51bd441638f177a18a744c78c3655988a4d.tar.xz | |
AMD Union Station: Use SPD read code from F14 wrapper
Changes:
- Get rid of the union_station mainboard specific code and
use the platform generic function wrapper that was added
in change http://review.coreboot.org/#/c/2497/
AMD f14: Add SPD read functions to wrapper code
- Move DIMM addresses into devicetree.cb
- Add the ASF init that used to be in the SPD read code into
mainboard_enable()
Notes:
- The DIMM reads only happen in romstage, so the function is not
available in ramstage. Point the read-SPD callback to a generic
function in ramstage.
Change-Id: I19d6b0d674b67294519383f80928471b37da1e14
Signed-off-by: Kimarie Hoot <kimarie.hoot@se-eng.com>
Reviewed-on: http://review.coreboot.org/2609
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/amd/union_station/mainboard.c')
| -rw-r--r-- | src/mainboard/amd/union_station/mainboard.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/src/mainboard/amd/union_station/mainboard.c b/src/mainboard/amd/union_station/mainboard.c index 916b62eb26..8816e8d356 100644 --- a/src/mainboard/amd/union_station/mainboard.c +++ b/src/mainboard/amd/union_station/mainboard.c @@ -22,8 +22,9 @@ #include <device/pci.h> #include <arch/io.h> #include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <device/pci_def.h> +#include <southbridge/amd/sb800/sb800.h> +#include <cpu/amd/mtrr.h> #include "SBPLATFORM.h" /* Platfrom Specific Definitions */ void set_pcie_reset(void); @@ -52,6 +53,15 @@ void set_pcie_dereset(void) static void mainboard_enable(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); + + /* + * Initialize ASF registers to an arbitrary address because someone + * long ago set things up this way inside the SPD read code. The + * SPD read code has been made generic and moved out of the board + * directory, so the ASF init is being done here. + */ + pm_iowrite(0x29, 0x80); + pm_iowrite(0x28, 0x61); } struct chip_operations mainboard_ops = { |