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authorKyösti Mälkki <kyosti.malkki@gmail.com>2012-07-11 08:02:57 +0300
committerPatrick Georgi <patrick@georgi-clan.de>2012-07-16 18:45:37 +0200
commit231f2614021967c9645d9e5b83dbea2089600be3 (patch)
treeeeb6529641384e8003e19213797d12feb925ecf7 /src/mainboard/amd
parent55fff930ce01aff16dfd24cf0d446a3a181dd6f7 (diff)
downloadcoreboot-231f2614021967c9645d9e5b83dbea2089600be3.tar.xz
Move setup_uma_memory() to AMDFAM10 northbridge
Following boards had identical code: advansus/a785e-i amd/bimini_fam10 amd/mahogany_fam10 asus/m5a88-v avalue/eax-785e gigabyte/ma78gm iei/kino-780am2-fam10 jetway/pa78vm5 Following boards had identical code: amd/tilapia_fam10 asus/m4a78-em asus/m4a785-m gigabyte/ma785gm gigabyte/ma785gmt In between the two, only whitespace difference. Change-Id: Iaa48cc7b0038ebcc81be49219b4fc87670aa9941 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1209 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r--src/mainboard/amd/bimini_fam10/mainboard.c40
-rw-r--r--src/mainboard/amd/mahogany_fam10/mainboard.c40
-rw-r--r--src/mainboard/amd/tilapia_fam10/mainboard.c39
3 files changed, 3 insertions, 116 deletions
diff --git a/src/mainboard/amd/bimini_fam10/mainboard.c b/src/mainboard/amd/bimini_fam10/mainboard.c
index 4d685e2f02..1be3c754ed 100644
--- a/src/mainboard/amd/bimini_fam10/mainboard.c
+++ b/src/mainboard/amd/bimini_fam10/mainboard.c
@@ -133,45 +133,7 @@ static void bimini_enable(device_t dev)
printk(BIOS_INFO, "Mainboard BIMINI Enable. dev=0x%p\n", dev);
-#if CONFIG_GFXUMA
- msr_t msr, msr2;
-
- /* TOP_MEM: the top of DRAM below 4G */
- msr = rdmsr(TOP_MEM);
- printk
- (BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
- __func__, msr.lo, msr.hi);
-
- /* TOP_MEM2: the top of DRAM above 4G */
- msr2 = rdmsr(TOP_MEM2);
- printk
- (BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
- __func__, msr2.lo, msr2.hi);
-
- /* refer to UMA Size Consideration in 780 BDG. */
- switch (msr.lo) {
- case 0x10000000: /* 256M system memory */
- uma_memory_size = 0x4000000; /* 64M recommended UMA */
- break;
-
- case 0x20000000: /* 512M system memory */
- uma_memory_size = 0x8000000; /* 128M recommended UMA */
- break;
-
- default: /* 1GB and above system memory */
- uma_memory_size = 0x10000000; /* 256M recommended UMA */
- break;
- }
-
- uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
- printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
- __func__, uma_memory_size, uma_memory_base);
-
- /* TODO: TOP_MEM2 */
-#else
- uma_memory_size = 0x8000000; /* 128M recommended UMA */
- uma_memory_base = 0x38000000; /* 1GB system memory supposed */
-#endif
+ setup_uma_memory();
set_pcie_dereset();
enable_int_gfx();
diff --git a/src/mainboard/amd/mahogany_fam10/mainboard.c b/src/mainboard/amd/mahogany_fam10/mainboard.c
index 16dff473ea..c25581d377 100644
--- a/src/mainboard/amd/mahogany_fam10/mainboard.c
+++ b/src/mainboard/amd/mahogany_fam10/mainboard.c
@@ -104,45 +104,7 @@ static void mahogany_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard MAHOGANY Enable. dev=0x%p\n", dev);
-#if CONFIG_GFXUMA
- msr_t msr, msr2;
-
- /* TOP_MEM: the top of DRAM below 4G */
- msr = rdmsr(TOP_MEM);
- printk
- (BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
- __func__, msr.lo, msr.hi);
-
- /* TOP_MEM2: the top of DRAM above 4G */
- msr2 = rdmsr(TOP_MEM2);
- printk
- (BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
- __func__, msr2.lo, msr2.hi);
-
- /* refer to UMA Size Consideration in 780 BDG. */
- switch (msr.lo) {
- case 0x10000000: /* 256M system memory */
- uma_memory_size = 0x4000000; /* 64M recommended UMA */
- break;
-
- case 0x20000000: /* 512M system memory */
- uma_memory_size = 0x8000000; /* 128M recommended UMA */
- break;
-
- default: /* 1GB and above system memory */
- uma_memory_size = 0x10000000; /* 256M recommended UMA */
- break;
- }
-
- uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
- printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
- __func__, uma_memory_size, uma_memory_base);
-
- /* TODO: TOP_MEM2 */
-#else
- uma_memory_size = 0x8000000; /* 128M recommended UMA */
- uma_memory_base = 0x38000000; /* 1GB system memory supposed */
-#endif
+ setup_uma_memory();
set_pcie_dereset();
/* get_ide_dma66(); */
diff --git a/src/mainboard/amd/tilapia_fam10/mainboard.c b/src/mainboard/amd/tilapia_fam10/mainboard.c
index 1777c2b15e..9c845fa4e8 100644
--- a/src/mainboard/amd/tilapia_fam10/mainboard.c
+++ b/src/mainboard/amd/tilapia_fam10/mainboard.c
@@ -279,44 +279,7 @@ static void tilapia_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard TILAPIA Enable. dev=0x%p\n", dev);
-#if CONFIG_GFXUMA
- msr_t msr, msr2;
-
- /* TOP_MEM: the top of DRAM below 4G */
- msr = rdmsr(TOP_MEM);
- printk(BIOS_INFO,
- "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
- __func__, msr.lo, msr.hi);
-
- /* TOP_MEM2: the top of DRAM above 4G */
- msr2 = rdmsr(TOP_MEM2);
- printk(BIOS_INFO,
- "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
- __func__, msr2.lo, msr2.hi);
-
- switch (msr.lo) {
- case 0x10000000: /* 256M system memory */
- uma_memory_size = 0x4000000; /* 64M recommended UMA */
- break;
-
- case 0x20000000: /* 512M system memory */
- uma_memory_size = 0x8000000; /* 128M recommended UMA */
- break;
-
- default: /* 1GB and above system memory */
- uma_memory_size = 0x10000000; /* 256M recommended UMA */
- break;
- }
-
- uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
- printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
- __func__, uma_memory_size, uma_memory_base);
-
- /* TODO: TOP_MEM2 */
-#else
- uma_memory_size = 0x8000000; /* 128M recommended UMA */
- uma_memory_base = 0x38000000; /* 1GB system memory supposed */
-#endif
+ setup_uma_memory();
set_pcie_dereset();
/* get_ide_dma66(); */