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authorEric Biederman <ebiederm@xmission.com>2003-07-21 20:13:45 +0000
committerEric Biederman <ebiederm@xmission.com>2003-07-21 20:13:45 +0000
commit2c018fba95a5f40c4eaaa20421e8c893dffdb62e (patch)
tree3b6ecc6eb72d145dd70bb549fe0130370d7e40fb /src/mainboard/amd
parent6d4512cdf976fc071720dbec686cf8a1a40f1db0 (diff)
downloadcoreboot-2c018fba95a5f40c4eaaa20421e8c893dffdb62e.tar.xz
- First pass at s2880 support.
- SMP cleanups (remove SMP only use CONFIG_SMP) - Minor tweaks to romcc to keep it from taking forever compiling - failover fixes - Get a good implementation of k8_cpufixup and sizeram for the opteron git-svn-id: svn://svn.coreboot.org/coreboot/trunk@998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r--src/mainboard/amd/quartet/auto.c5
-rw-r--r--src/mainboard/amd/solo/auto.c6
2 files changed, 11 insertions, 0 deletions
diff --git a/src/mainboard/amd/quartet/auto.c b/src/mainboard/amd/quartet/auto.c
index b773379dc6..8ba6a0d6e9 100644
--- a/src/mainboard/amd/quartet/auto.c
+++ b/src/mainboard/amd/quartet/auto.c
@@ -86,6 +86,11 @@ static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes)
return ret;
}
+static inline int spd_read_byte(unsigned device, unsigned address)
+{
+ return smbus_read_byte(device, address);
+}
+
#include "northbridge/amd/amdk8/cpu_ldtstop.c"
#include "southbridge/amd/amd8111/amd8111_ldtstop.c"
diff --git a/src/mainboard/amd/solo/auto.c b/src/mainboard/amd/solo/auto.c
index 848cddfc5b..bb1cd753fe 100644
--- a/src/mainboard/amd/solo/auto.c
+++ b/src/mainboard/amd/solo/auto.c
@@ -25,6 +25,12 @@ static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes)
return 0x00010101; /* default row entry */
}
+static inline int spd_read_byte(unsigned device, unsigned address)
+{
+ return smbus_read_byte(device, address);
+}
+
+
#include "northbridge/amd/amdk8/raminit.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"