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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-10-20 07:04:55 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-10-22 15:04:32 +0200 |
| commit | 30fbb4c23e7b867c707d61520c05cc4c6c17e174 (patch) | |
| tree | 3a42efe5d064a99bf846a50dbe44dc1577dec4e5 /src/mainboard/amd | |
| parent | 22d824b1dd63ad47dcf7cbc40ffc4990ab88c987 (diff) | |
| download | coreboot-30fbb4c23e7b867c707d61520c05cc4c6c17e174.tar.xz | |
AGESA boards: Fix early agesawrapper_amdinitmmio()
Regression introduced with commit
7b23ae0 AGESA: Trace execution with AGESAWRAPPER()
As the call is made before console_init() is called it must
not call any printk(). Debugging Olivehill and Parmer platforms
using a custom FPGA (as these boards have no Super-IO UART) have
been observed to halt and/or delay at early boot.
Change-Id: I3ab4e5378db44aece9046c8636cde1053ce5390d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7059
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Diffstat (limited to 'src/mainboard/amd')
| -rw-r--r-- | src/mainboard/amd/olivehill/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/olivehillplus/romstage.c | 10 | ||||
| -rw-r--r-- | src/mainboard/amd/parmer/romstage.c | 3 | ||||
| -rw-r--r-- | src/mainboard/amd/thatcher/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/torpedo/romstage.c | 2 |
5 files changed, 6 insertions, 13 deletions
diff --git a/src/mainboard/amd/olivehill/romstage.c b/src/mainboard/amd/olivehill/romstage.c index 326a41ab8c..4c1b18e6f4 100644 --- a/src/mainboard/amd/olivehill/romstage.c +++ b/src/mainboard/amd/olivehill/romstage.c @@ -51,7 +51,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) outb(0xD2, 0xcd6); outb(0x00, 0xcd7); - AGESAWRAPPER(amdinitmmio); + AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); hudson_lpc_port80(); diff --git a/src/mainboard/amd/olivehillplus/romstage.c b/src/mainboard/amd/olivehillplus/romstage.c index 88f1163844..6f300ce6fd 100644 --- a/src/mainboard/amd/olivehillplus/romstage.c +++ b/src/mainboard/amd/olivehillplus/romstage.c @@ -41,7 +41,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { u32 val; volatile int halt = 0; - AGESA_STATUS status = AGESA_UNSUPPORTED; /* * In Hudson RRG, PMIOxD2[5:4] is "Drive strength control for @@ -54,14 +53,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) outb(0xD2, 0xcd6); outb(0x00, 0xcd7); - /* - * The following should be a call to AGESAWRAPPER() macro, but - * that would use console output before it is initialized. - */ - status = agesawrapper_amdinitmmio(); - if (AGESA_SUCCESS != status) { - printk(BIOS_WARNING, "AmdInitMmio reported %s\n", decodeAGESA_STATUS(status)); - } + AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); hudson_lpc_port80(); diff --git a/src/mainboard/amd/parmer/romstage.c b/src/mainboard/amd/parmer/romstage.c index 7c143f4fde..7aa246cc04 100644 --- a/src/mainboard/amd/parmer/romstage.c +++ b/src/mainboard/amd/parmer/romstage.c @@ -42,7 +42,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { u32 val; - AGESAWRAPPER(amdinitmmio); + + AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); hudson_lpc_port80(); diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c index 8ee42bd5e4..cc978663b3 100644 --- a/src/mainboard/amd/thatcher/romstage.c +++ b/src/mainboard/amd/thatcher/romstage.c @@ -47,7 +47,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) u32 val; u8 byte; device_t dev; - AGESAWRAPPER(amdinitmmio); + AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); hudson_lpc_port80(); //__asm__ volatile ("1: jmp 1b"); diff --git a/src/mainboard/amd/torpedo/romstage.c b/src/mainboard/amd/torpedo/romstage.c index 7ed520a9bc..1b12f73330 100644 --- a/src/mainboard/amd/torpedo/romstage.c +++ b/src/mainboard/amd/torpedo/romstage.c @@ -45,7 +45,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) u32 val; post_code(0x35); - AGESAWRAPPER(amdinitmmio); + AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); if (!cpu_init_detectedx && boot_cpu()) { post_code(0x30); |