AMD GX2 boards & chips: Remove - using LATE_CBMEM_INIT

All boards and chips that are still using LATE_CBMEM_INIT are being
removed as previously discussed.

If these boards and chips are updated to not use LATE_CBMEM_INIT, they
can be restored to the active codebase from the 4.7 branch.

chips:
cpu/amd/geode_gx2
northbridge/amd/gx2
southbridge/amd/cs5535

Mainboards:
mainboard/amd/rumba
mainboard/lippert/frontrunner
mainboard/wyse/s50

Change-Id: I81c130f53bbfa001edbfdb7a878ef115757f620c
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/22025
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

8 files changed, 0 insertions, 266 deletions

diff --git a/src/mainboard/amd/rumba/Kconfig b/src/mainboard/amd/rumba/Kconfig
deleted file mode 100644
index dfdf5edd47..0000000000
--- a/src/mainboard/amd/rumba/Kconfig
+++ /dev/null
@@ -1,41 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if BOARD_AMD_RUMBA
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_AMD_GEODE_GX2
-	select NORTHBRIDGE_AMD_GX2
-	select SOUTHBRIDGE_AMD_CS5536
-	select SUPERIO_WINBOND_W83627HF
-	select UDELAY_TSC
-	select HAVE_PIRQ_TABLE
-	select BOARD_ROMSIZE_KB_256
-	select POWER_BUTTON_FORCE_ENABLE
-	select GX2_PROCESSOR_MHZ_366
-
-config MAINBOARD_DIR
-	string
-	default amd/rumba
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "Rumba"
-
-config IRQ_SLOT_COUNT
-	int
-	default 2
-
-endif # BOARD_AMD_RUMBA
diff --git a/src/mainboard/amd/rumba/Kconfig.name b/src/mainboard/amd/rumba/Kconfig.name
deleted file mode 100644
index e00444ef06..0000000000
--- a/src/mainboard/amd/rumba/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_AMD_RUMBA
-	bool "Rumba"
diff --git a/src/mainboard/amd/rumba/board_info.txt b/src/mainboard/amd/rumba/board_info.txt
deleted file mode 100644
index 7680e6f854..0000000000
--- a/src/mainboard/amd/rumba/board_info.txt
+++ /dev/null
@@ -1 +0,0 @@
-Category: half
diff --git a/src/mainboard/amd/rumba/cmos.layout b/src/mainboard/amd/rumba/cmos.layout
deleted file mode 100644
index b8ea9363a4..0000000000
--- a/src/mainboard/amd/rumba/cmos.layout
+++ /dev/null
@@ -1,28 +0,0 @@
-entries
-
-0          384       r       0        reserved_memory
-384          1       e       4        boot_option
-388          4       h       0        reboot_counter
-#392          3       r       0        unused
-400          1       e       1        power_on_after_fail
-412          4       e       6        debug_level
-456          1       e       1        ECC_memory
-1008         16      h       0        check_sum
-
-enumerations
-
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-6     6     Notice
-6     7     Info
-6     8     Debug
-6     9     Spew
-
-checksums
-
-checksum 392 1007 1008
diff --git a/src/mainboard/amd/rumba/devicetree.cb b/src/mainboard/amd/rumba/devicetree.cb
deleted file mode 100644
index d48035521c..0000000000
--- a/src/mainboard/amd/rumba/devicetree.cb
+++ /dev/null
@@ -1,20 +0,0 @@
-chip northbridge/amd/gx2
-	device cpu_cluster 0 on
-		chip cpu/amd/geode_gx2
-			device lapic 0 on end
-		end
-	end
-	device domain 0 on
-		device pci 1.0 on end
-		device pci 1.1 on end
-		chip southbridge/amd/cs5536
-			register "lpc_serirq_enable" = "0x80"  # enabled with default timing
-			device pci d.0 on end	# Realtek 8139 LAN
-			device pci f.0 on end	# ISA Bridge
-			device pci f.2 on end	# IDE Controller
-			device pci f.3 on end	# Audio
-			device pci f.4 on end	# OHCI
-			device pci f.5 on end	# EHCI
-		end
-	end
-end
diff --git a/src/mainboard/amd/rumba/irq_tables.c b/src/mainboard/amd/rumba/irq_tables.c
deleted file mode 100644
index ac225a4db8..0000000000
--- a/src/mainboard/amd/rumba/irq_tables.c
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/pirq_routing.h>
-
-/* Platform IRQs */
-#define PIRQA 11
-#define PIRQB 5
-#define PIRQC 10
-#define PIRQD 10
-
-/* Map */
-#define M_PIRQA (1 << PIRQA)	/* Bitmap of supported IRQs */
-#define M_PIRQB (1 << PIRQB)	/* Bitmap of supported IRQs */
-#define M_PIRQC (1 << PIRQC)	/* Bitmap of supported IRQs */
-#define M_PIRQD (1 << PIRQD)	/* Bitmap of supported IRQs */
-
-/* Link */
-#define L_PIRQA	 1		/* Means Slot INTx# Connects To Chipset INTA# */
-#define L_PIRQB	 2		/* Means Slot INTx# Connects To Chipset INTB# */
-#define L_PIRQC	 3		/* Means Slot INTx# Connects To Chipset INTC# */
-#define L_PIRQD	 4		/* Means Slot INTx# Connects To Chipset INTD# */
-
-static const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,  /* u32 signature */
-	PIRQ_VERSION,    /* u16 version   */
-	32+16*CONFIG_IRQ_SLOT_COUNT,	 /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
-	0x00,		 /* Where the interrupt router lies (bus) */
-	(0x12 << 3)|0x0,   /* Where the interrupt router lies (dev) */
-	0x800,		 /* IRQs devoted exclusively to PCI usage */
-	0x1078,		 /* Vendor */
-	0x2,		 /* Device */
-	0,		 /* Miniport data */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0xdf,         /*  u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
-	{
-		/* bus,       dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
-		{0x00,(0x0e << 3)|0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0x0deb8}}, 0x1, 0x0},
-		{0x00,(0x0f << 3)|0x0, {{0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0xdeb8}, {0x02, 0x0deb8}}, 0x2, 0x0},
-	}
-};
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/amd/rumba/mainboard.c b/src/mainboard/amd/rumba/mainboard.c
deleted file mode 100644
index a971db658b..0000000000
--- a/src/mainboard/amd/rumba/mainboard.c
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <console/console.h>
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <device/pci_ops.h>
-#include <arch/io.h>
-
-static void init(struct device *dev)
-{
-	device_t nic = NULL;
-	unsigned bus = 0;
-	unsigned devfn = PCI_DEVFN(0xd, 0);
-	int nicirq = 1;
-
-	printk(BIOS_DEBUG, "AMD RUMBA ENTER %s\n", __func__);
-
-	if (nicirq) {
-		printk(BIOS_DEBUG, "%s (%x,%x)SET PCI interrupt line to %d\n",
-			__func__, bus, devfn, nicirq);
-		nic = dev_find_slot(bus, devfn);
-		if (! nic){
-			printk(BIOS_ERR, "Could not find NIC\n");
-		} else {
-			pci_write_config8(nic, PCI_INTERRUPT_LINE, nicirq);
-		}
-	}
-	printk(BIOS_DEBUG, "AMD RUMBA EXIT %s\n", __func__);
-}
-
-static void mainboard_enable(struct device *dev)
-{
-	dev->ops->init = init;
-}
-
-struct chip_operations mainboard_ops = {
-	.enable_dev = mainboard_enable,
-};
diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c
deleted file mode 100644
index 4d9600a8d0..0000000000
--- a/src/mainboard/amd/rumba/romstage.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include <superio/winbond/common/winbond.h>
-#include <superio/winbond/w83627hf/w83627hf.h>
-#include <cpu/x86/bist.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/gx2def.h>
-#include <spd.h>
-#include <southbridge/amd/cs5536/cs5536.h>
-
-#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
- 	if (device != DIMM0)
-		return 0xFF;	/* No DIMM1, don't even try. */
-
-	return smbus_read_byte(device, address);
-}
-
-#include <northbridge/amd/gx2/raminit.h>
-#include "northbridge/amd/gx2/pll_reset.c"
-#include "northbridge/amd/gx2/raminit.c"
-#include "lib/generic_sdram.c"
-#include "cpu/amd/geode_gx2/cpureginit.c"
-#include "cpu/amd/geode_gx2/syspreinit.c"
-#include "cpu/amd/geode_lx/msrinit.c"
-
-void asmlinkage mainboard_romstage_entry(unsigned long bist)
-{
-	static const struct mem_controller memctrl [] = {
-		{.channel0 = {DIMM0, DIMM1}}
-	};
-
-	SystemPreInit();
-
-	winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-
-	cs5536_early_setup();
-
-	/* Halt if there was a built in self test failure */
-	report_bist_failure(bist);
-
-	pll_reset();
-
-	cpuRegInit();
-	printk(BIOS_ERR, "done cpuRegInit\n");
-
-	sdram_initialize(1, memctrl);
-
-	msr_init();
-}