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authorMarshall Dawson <marshalldawson3rd@gmail.com>2017-05-15 11:02:41 -0600
committerMartin Roth <martinroth@google.com>2017-06-28 18:23:44 +0000
commit218579801928e65128c59ddfaa13b99f8f067663 (patch)
tree9b4ad755e0aa13e46641cf31d2562f1d1f56d09d /src/mainboard/amd
parentf5c3518f0eaa3896efa684293aac69b4893ff7ae (diff)
downloadcoreboot-218579801928e65128c59ddfaa13b99f8f067663.tar.xz
amd/gardenia: Init cbmem in romstage
Change-Id: I6ede71ec660678bb5f77693a9095aa0f198e4e26 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/19752 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r--src/mainboard/amd/gardenia/romstage.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/amd/gardenia/romstage.c b/src/mainboard/amd/gardenia/romstage.c
index cd90494702..471d63248e 100644
--- a/src/mainboard/amd/gardenia/romstage.c
+++ b/src/mainboard/amd/gardenia/romstage.c
@@ -17,6 +17,7 @@
#include <arch/acpi.h>
#include <arch/io.h>
#include <arch/stages.h>
+#include <cbmem.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/bist.h>
#include <cpu/amd/car.h>
@@ -62,7 +63,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x40);
AGESAWRAPPER(amdinitpost);
+
post_code(0x41);
+ cbmem_initialize_empty();
+
+ post_code(0x42);
AGESAWRAPPER(amdinitenv);
/* TODO: Disable cache is not ok. */
disable_cache_as_ram();