summaryrefslogtreecommitdiff
path: root/src/mainboard/amd
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2019-01-09 08:43:09 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-01-10 03:14:49 +0000
commit2dce9235244c15efa7c34762a0c47b1fa211ffad (patch)
treefaf7fdd988058c9a1c81dd492802461442b13445 /src/mainboard/amd
parent7d1a948fbb0b9b4d5ebc6c06aed272f83c0718c5 (diff)
downloadcoreboot-2dce9235244c15efa7c34762a0c47b1fa211ffad.tar.xz
mb: Move timestamp_add_now to northbridge/amd/amdfam10
Also remove some commented code. Change-Id: If2e91ad871b14b305e2181194d77b100e72f5763 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/30771 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r--src/mainboard/amd/bimini_fam10/romstage.c3
-rw-r--r--src/mainboard/amd/mahogany_fam10/romstage.c14
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/romstage.c3
-rw-r--r--src/mainboard/amd/tilapia_fam10/romstage.c3
4 files changed, 0 insertions, 23 deletions
diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c
index 3d86b60afc..602a433b2d 100644
--- a/src/mainboard/amd/bimini_fam10/romstage.c
+++ b/src/mainboard/amd/bimini_fam10/romstage.c
@@ -189,10 +189,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x40);
- timestamp_add_now(TS_BEFORE_INITRAM);
- printk(BIOS_DEBUG, "raminit_amdmct()\n");
raminit_amdmct(sysinfo);
- timestamp_add_now(TS_AFTER_INITRAM);
cbmem_initialize_empty();
post_code(0x41);
diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c
index b0d23b2dec..c9fc9ec7ae 100644
--- a/src/mainboard/amd/mahogany_fam10/romstage.c
+++ b/src/mainboard/amd/mahogany_fam10/romstage.c
@@ -194,27 +194,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x40);
-// die("Die Before MCT init.");
-
- timestamp_add_now(TS_BEFORE_INITRAM);
- printk(BIOS_DEBUG, "raminit_amdmct()\n");
raminit_amdmct(sysinfo);
- timestamp_add_now(TS_AFTER_INITRAM);
cbmem_initialize_empty();
post_code(0x41);
amdmct_cbmem_store_info(sysinfo);
-/*
- dump_pci_device_range(PCI_DEV(0, 0x18, 0), 0, 0x200);
- dump_pci_device_range(PCI_DEV(0, 0x18, 1), 0, 0x200);
- dump_pci_device_range(PCI_DEV(0, 0x18, 2), 0, 0x200);
- dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200);
-*/
-
-// die("After MCT init before CAR disabled.");
-
sb7xx_51xx_before_pci_init();
post_code(0x42);
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
index 03d3484105..567a60a701 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
@@ -300,10 +300,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
memreset_setup();
post_code(0x40);
- timestamp_add_now(TS_BEFORE_INITRAM);
- printk(BIOS_DEBUG, "raminit_amdmct()\n");
raminit_amdmct(sysinfo);
- timestamp_add_now(TS_AFTER_INITRAM);
cbmem_initialize_empty();
post_code(0x41);
diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c
index 50c7a002dd..b027e498aa 100644
--- a/src/mainboard/amd/tilapia_fam10/romstage.c
+++ b/src/mainboard/amd/tilapia_fam10/romstage.c
@@ -190,10 +190,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x40);
- timestamp_add_now(TS_BEFORE_INITRAM);
- printk(BIOS_DEBUG, "raminit_amdmct()\n");
raminit_amdmct(sysinfo);
- timestamp_add_now(TS_AFTER_INITRAM);
cbmem_initialize_empty();
post_code(0x41);