AMD Geode cpus: apply un-written naming rules

Kconfig directives to select chip drivers for compile literally
match the chip directory names capitalized and underscored.

Rename directories and Kconfig as follows:
   model_lx  -> geode_lx
   model_gx1 -> geode_gx1
   model_gx2 -> geode_gx2

Change-Id: Ib8bf1e758b88f9efed1cf8b11c76b796388e7147
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/613
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

9 files changed, 15 insertions, 15 deletions

diff --git a/src/mainboard/amd/db800/Kconfig b/src/mainboard/amd/db800/Kconfig
index 834e08589c..ee2aa0f44c 100644
--- a/src/mainboard/amd/db800/Kconfig
+++ b/src/mainboard/amd/db800/Kconfig
@@ -3,7 +3,7 @@ if BOARD_AMD_DB800
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select ARCH_X86
-	select CPU_AMD_LX
+	select CPU_AMD_GEODE_LX
 	select NORTHBRIDGE_AMD_LX
 	select SOUTHBRIDGE_AMD_CS5536
 	select SUPERIO_WINBOND_W83627HF
diff --git a/src/mainboard/amd/db800/devicetree.cb b/src/mainboard/amd/db800/devicetree.cb
index e872571194..e0f20dc9b7 100644
--- a/src/mainboard/amd/db800/devicetree.cb
+++ b/src/mainboard/amd/db800/devicetree.cb
@@ -60,7 +60,7 @@ chip northbridge/amd/lx
 	end
 	# APIC cluster is late CPU init.
 	device lapic_cluster 0 on
-		chip cpu/amd/model_lx
+		chip cpu/amd/geode_lx
 			device lapic 0 on end
 		end
 	end
diff --git a/src/mainboard/amd/db800/romstage.c b/src/mainboard/amd/db800/romstage.c
index 264f1a809e..3590c37bfe 100644
--- a/src/mainboard/amd/db800/romstage.c
+++ b/src/mainboard/amd/db800/romstage.c
@@ -49,9 +49,9 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
 #include "northbridge/amd/lx/pll_reset.c"
 #include "northbridge/amd/lx/raminit.c"
 #include "lib/generic_sdram.c"
-#include "cpu/amd/model_lx/cpureginit.c"
-#include "cpu/amd/model_lx/syspreinit.c"
-#include "cpu/amd/model_lx/msrinit.c"
+#include "cpu/amd/geode_lx/cpureginit.c"
+#include "cpu/amd/geode_lx/syspreinit.c"
+#include "cpu/amd/geode_lx/msrinit.c"
 
 void main(unsigned long bist)
 {
diff --git a/src/mainboard/amd/norwich/Kconfig b/src/mainboard/amd/norwich/Kconfig
index b265eeb103..dec8e01d34 100644
--- a/src/mainboard/amd/norwich/Kconfig
+++ b/src/mainboard/amd/norwich/Kconfig
@@ -3,7 +3,7 @@ if BOARD_AMD_NORWICH
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select ARCH_X86
-	select CPU_AMD_LX
+	select CPU_AMD_GEODE_LX
 	select NORTHBRIDGE_AMD_LX
 	select SOUTHBRIDGE_AMD_CS5536
 	select HAVE_PIRQ_TABLE
diff --git a/src/mainboard/amd/norwich/devicetree.cb b/src/mainboard/amd/norwich/devicetree.cb
index 533ea92b2d..b2ede77ed1 100644
--- a/src/mainboard/amd/norwich/devicetree.cb
+++ b/src/mainboard/amd/norwich/devicetree.cb
@@ -33,7 +33,7 @@ chip northbridge/amd/lx
 	end
 	# APIC cluster is late CPU init.
 	device lapic_cluster 0 on
-		chip cpu/amd/model_lx
+		chip cpu/amd/geode_lx
 			device lapic 0 on end
 		end
 	end
diff --git a/src/mainboard/amd/norwich/romstage.c b/src/mainboard/amd/norwich/romstage.c
index 097965f3b1..d8fca5a51f 100644
--- a/src/mainboard/amd/norwich/romstage.c
+++ b/src/mainboard/amd/norwich/romstage.c
@@ -46,9 +46,9 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
 #include "northbridge/amd/lx/pll_reset.c"
 #include "northbridge/amd/lx/raminit.c"
 #include "lib/generic_sdram.c"
-#include "cpu/amd/model_lx/cpureginit.c"
-#include "cpu/amd/model_lx/syspreinit.c"
-#include "cpu/amd/model_lx/msrinit.c"
+#include "cpu/amd/geode_lx/cpureginit.c"
+#include "cpu/amd/geode_lx/syspreinit.c"
+#include "cpu/amd/geode_lx/msrinit.c"
 
 void main(unsigned long bist)
 {
diff --git a/src/mainboard/amd/rumba/Kconfig b/src/mainboard/amd/rumba/Kconfig
index 0477f32ec9..3f55d0135e 100644
--- a/src/mainboard/amd/rumba/Kconfig
+++ b/src/mainboard/amd/rumba/Kconfig
@@ -21,7 +21,7 @@ if BOARD_AMD_RUMBA
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select ARCH_X86
-	select CPU_AMD_GX2
+	select CPU_AMD_GEODE_GX2
 	select NORTHBRIDGE_AMD_GX2
 	select SOUTHBRIDGE_AMD_CS5536
 	select UDELAY_TSC
diff --git a/src/mainboard/amd/rumba/devicetree.cb b/src/mainboard/amd/rumba/devicetree.cb
index 40490e1875..e55f5c77b9 100644
--- a/src/mainboard/amd/rumba/devicetree.cb
+++ b/src/mainboard/amd/rumba/devicetree.cb
@@ -1,6 +1,6 @@
 chip northbridge/amd/gx2
 	device lapic_cluster 0 on
-		chip cpu/amd/model_gx2
+		chip cpu/amd/geode_gx2
 			device lapic 0 on end
 		end
 	end
diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c
index 49dfa68bd5..cec7c3698b 100644
--- a/src/mainboard/amd/rumba/romstage.c
+++ b/src/mainboard/amd/rumba/romstage.c
@@ -26,9 +26,9 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "northbridge/amd/gx2/pll_reset.c"
 #include "northbridge/amd/gx2/raminit.c"
 #include "lib/generic_sdram.c"
-#include "cpu/amd/model_gx2/cpureginit.c"
-#include "cpu/amd/model_gx2/syspreinit.c"
-#include "cpu/amd/model_lx/msrinit.c"
+#include "cpu/amd/geode_gx2/cpureginit.c"
+#include "cpu/amd/geode_gx2/syspreinit.c"
+#include "cpu/amd/geode_lx/msrinit.c"
 
 void main(unsigned long bist)
 {