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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-07-13 13:38:17 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-22 20:24:38 +0000 |
| commit | 90e07b460cffb4fbfee336a2b614cb8d08e4bfaa (patch) | |
| tree | 65008aab02605965c161712f1a886575256b2286 /src/mainboard/amd | |
| parent | b98391c0ee3d9d95b3c256e3ce170ff52b98b2c4 (diff) | |
| download | coreboot-90e07b460cffb4fbfee336a2b614cb8d08e4bfaa.tar.xz | |
AMD K8 fam10-15: Consolidate post_cache_as_ram call
Change-Id: I5e7890aafbc8c80716ee49690e306482a482a863
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20573
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Diffstat (limited to 'src/mainboard/amd')
| -rw-r--r-- | src/mainboard/amd/bimini_fam10/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/dbm690t/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/mahogany/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/mahogany_fam10/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/pistachio/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/serengeti_cheetah/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/serengeti_cheetah_fam10/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/tilapia_fam10/romstage.c | 2 |
8 files changed, 0 insertions, 16 deletions
diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c index 53cc64855d..4a3fbe0c24 100644 --- a/src/mainboard/amd/bimini_fam10/romstage.c +++ b/src/mainboard/amd/bimini_fam10/romstage.c @@ -204,8 +204,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sb800_before_pci_init(); post_code(0x42); - post_cache_as_ram(); /* BSP switch stack to ram, copy then execute LB. */ - post_code(0x43); /* Should never see this post code. */ } /** diff --git a/src/mainboard/amd/dbm690t/romstage.c b/src/mainboard/amd/dbm690t/romstage.c index faf3ef5a45..e1c92ac7b6 100644 --- a/src/mainboard/amd/dbm690t/romstage.c +++ b/src/mainboard/amd/dbm690t/romstage.c @@ -141,6 +141,4 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) rs690_before_pci_init(); sb600_before_pci_init(); - - post_cache_as_ram(); } diff --git a/src/mainboard/amd/mahogany/romstage.c b/src/mainboard/amd/mahogany/romstage.c index c19499658b..7cc45bf36e 100644 --- a/src/mainboard/amd/mahogany/romstage.c +++ b/src/mainboard/amd/mahogany/romstage.c @@ -144,6 +144,4 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) rs780_before_pci_init(); sb7xx_51xx_before_pci_init(); - - post_cache_as_ram(); } diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index 03938225aa..b4d8763084 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -220,8 +220,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sb7xx_51xx_before_pci_init(); post_code(0x42); - post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB. - post_code(0x43); // Should never see this post code. } /** diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c index 38b300394a..2a4b159e6f 100644 --- a/src/mainboard/amd/pistachio/romstage.c +++ b/src/mainboard/amd/pistachio/romstage.c @@ -153,6 +153,4 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) rs690_before_pci_init(); sb600_before_pci_init(); - - post_cache_as_ram(); } diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c index aaec8c77ef..5a8b6378f0 100644 --- a/src/mainboard/amd/serengeti_cheetah/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah/romstage.c @@ -194,6 +194,4 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Need to use TMICT to synchronize FID/VID */ sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); - - post_cache_as_ram(); /* bsp swtich stack to RAM and copy sysinfo RAM now */ } diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c index e130ebd78a..ed5a6cbd16 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c @@ -313,8 +313,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) amdmct_cbmem_store_info(sysinfo); post_code(0x42); - post_cache_as_ram(); /* BSP switch stack to ram, copy then execute LB. */ - post_code(0x43); /* Should never see this post code. */ } /** diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c index 92fee4562c..48684d97a0 100644 --- a/src/mainboard/amd/tilapia_fam10/romstage.c +++ b/src/mainboard/amd/tilapia_fam10/romstage.c @@ -205,8 +205,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sb7xx_51xx_before_pci_init(); post_code(0x42); - post_cache_as_ram(); /* BSP switch stack to ram, copy then execute LB. */ - post_code(0x43); /* Should never see this post code. */ } /** |