diff options
author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-01-26 11:45:30 +1100 |
---|---|---|
committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2014-01-29 20:06:57 +0100 |
commit | 5760e197b3cfc5718740bc5aea4861ea521b9e01 (patch) | |
tree | 442f2861115de6b9035e8d96013c4b1c21bce5c3 /src/mainboard/amd | |
parent | 9ad52fe56e8fbb1cd2e37795741773708b72eef3 (diff) | |
download | coreboot-5760e197b3cfc5718740bc5aea4861ea521b9e01.tar.xz |
AGESA boards: Clean up definition of BIOS_SIZE in platform_cfg
Clean up vendor code from hard coded #define if-def chain with a
pre-processor shift and subtract.
Change-Id: Ibce34ab576d7db8586a6ec8f9b2460268e0e1878
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/4811
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r-- | src/mainboard/amd/inagua/platform_cfg.h | 26 | ||||
-rw-r--r-- | src/mainboard/amd/persimmon/platform_cfg.h | 28 | ||||
-rw-r--r-- | src/mainboard/amd/south_station/platform_cfg.h | 26 | ||||
-rw-r--r-- | src/mainboard/amd/torpedo/platform_cfg.h | 32 | ||||
-rw-r--r-- | src/mainboard/amd/union_station/platform_cfg.h | 26 |
5 files changed, 30 insertions, 108 deletions
diff --git a/src/mainboard/amd/inagua/platform_cfg.h b/src/mainboard/amd/inagua/platform_cfg.h index 1f602e240c..151f587e51 100644 --- a/src/mainboard/amd/inagua/platform_cfg.h +++ b/src/mainboard/amd/inagua/platform_cfg.h @@ -22,31 +22,15 @@ #define _PLATFORM_CFG_H_ /** - * @def BIOS_SIZE_1M - * @def BIOS_SIZE_2M - * @def BIOS_SIZE_4M - * @def BIOS_SIZE_8M - */ -#define BIOS_SIZE_1M 0 -#define BIOS_SIZE_2M 1 -#define BIOS_SIZE_4M 3 -#define BIOS_SIZE_8M 7 - -/* In SB800, default ROM size is 1M Bytes, if your platform ROM + * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M + * + * In SB800, default ROM size is 1M Bytes, if your platform ROM * bigger than 1M you have to set the ROM size outside CIMx module and * before AGESA module get call. */ #ifndef BIOS_SIZE -#if CONFIG_COREBOOT_ROMSIZE_KB_1024 -#define BIOS_SIZE BIOS_SIZE_1M -#elif CONFIG_COREBOOT_ROMSIZE_KB_2048 == 1 -#define BIOS_SIZE BIOS_SIZE_2M -#elif CONFIG_COREBOOT_ROMSIZE_KB_4096 == 1 -#define BIOS_SIZE BIOS_SIZE_4M -#elif CONFIG_COREBOOT_ROMSIZE_KB_8192 == 1 -#define BIOS_SIZE BIOS_SIZE_8M -#endif -#endif +#define BIOS_SIZE ((CONFIG_COREBOOT_ROMSIZE_KB >> 10) - 1) +#endif /* BIOS_SIZE */ /** * @def SPREAD_SPECTRUM diff --git a/src/mainboard/amd/persimmon/platform_cfg.h b/src/mainboard/amd/persimmon/platform_cfg.h index 0578e27081..f084b2f170 100644 --- a/src/mainboard/amd/persimmon/platform_cfg.h +++ b/src/mainboard/amd/persimmon/platform_cfg.h @@ -22,31 +22,15 @@ #define _PLATFORM_CFG_H_ /** - * @def BIOS_SIZE_1M - * @def BIOS_SIZE_2M - * @def BIOS_SIZE_4M - * @def BIOS_SIZE_8M - */ -#define BIOS_SIZE_1M 0 -#define BIOS_SIZE_2M 1 -#define BIOS_SIZE_4M 3 -#define BIOS_SIZE_8M 7 - -/* In SB800, default ROM size is 1M Bytes, if your platform ROM + * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M + * + * In SB800, default ROM size is 1M Bytes, if your platform ROM * bigger than 1M you have to set the ROM size outside CIMx module and * before AGESA module get call. */ #ifndef BIOS_SIZE -#if CONFIG_COREBOOT_ROMSIZE_KB_1024 - #define BIOS_SIZE BIOS_SIZE_1M -#elif CONFIG_COREBOOT_ROMSIZE_KB_2048 == 1 - #define BIOS_SIZE BIOS_SIZE_2M -#elif CONFIG_COREBOOT_ROMSIZE_KB_4096 == 1 - #define BIOS_SIZE BIOS_SIZE_4M -#elif CONFIG_COREBOOT_ROMSIZE_KB_8192 == 1 - #define BIOS_SIZE BIOS_SIZE_8M -#endif -#endif +#define BIOS_SIZE ((CONFIG_COREBOOT_ROMSIZE_KB >> 10) - 1) +#endif /* BIOS_SIZE */ /** * @def SPREAD_SPECTRUM @@ -270,4 +254,4 @@ static const CODECTBLLIST codec_tablelist[] = */ #define FADT_PM_PROFILE 1 -#endif +#endif /* _PLATFORM_CFG_H_ */ diff --git a/src/mainboard/amd/south_station/platform_cfg.h b/src/mainboard/amd/south_station/platform_cfg.h index a8888d20d8..151f587e51 100644 --- a/src/mainboard/amd/south_station/platform_cfg.h +++ b/src/mainboard/amd/south_station/platform_cfg.h @@ -22,31 +22,15 @@ #define _PLATFORM_CFG_H_ /** - * @def BIOS_SIZE_1M - * @def BIOS_SIZE_2M - * @def BIOS_SIZE_4M - * @def BIOS_SIZE_8M - */ -#define BIOS_SIZE_1M 0 -#define BIOS_SIZE_2M 1 -#define BIOS_SIZE_4M 3 -#define BIOS_SIZE_8M 7 - -/* In SB800, default ROM size is 1M Bytes, if your platform ROM + * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M + * + * In SB800, default ROM size is 1M Bytes, if your platform ROM * bigger than 1M you have to set the ROM size outside CIMx module and * before AGESA module get call. */ #ifndef BIOS_SIZE -#if CONFIG_COREBOOT_ROMSIZE_KB_1024 - #define BIOS_SIZE BIOS_SIZE_1M -#elif CONFIG_COREBOOT_ROMSIZE_KB_2048 == 1 - #define BIOS_SIZE BIOS_SIZE_2M -#elif CONFIG_COREBOOT_ROMSIZE_KB_4096 == 1 - #define BIOS_SIZE BIOS_SIZE_4M -#elif CONFIG_COREBOOT_ROMSIZE_KB_8192 == 1 - #define BIOS_SIZE BIOS_SIZE_8M -#endif -#endif +#define BIOS_SIZE ((CONFIG_COREBOOT_ROMSIZE_KB >> 10) - 1) +#endif /* BIOS_SIZE */ /** * @def SPREAD_SPECTRUM diff --git a/src/mainboard/amd/torpedo/platform_cfg.h b/src/mainboard/amd/torpedo/platform_cfg.h index 8ecb09c11d..bc69938ff9 100644 --- a/src/mainboard/amd/torpedo/platform_cfg.h +++ b/src/mainboard/amd/torpedo/platform_cfg.h @@ -25,29 +25,15 @@ /** - * @section BIOSSize BIOSSize - * @li <b>0</b> - 1M - * @li <b>1</b> - 2M - * @li <b>3</b> - 4M - * @li <b>7</b> - 8M - * In Hudson-2, default ROM size is 1M Bytes, if your platform - * ROM bigger then 1M you have to set the ROM size outside CIMx - * module and before AGESA module get call. - */ -#define BIOS_SIZE_1M 0 -#define BIOS_SIZE_2M 1 -#define BIOS_SIZE_4M 3 -#define BIOS_SIZE_8M 7 - -#if CONFIG_COREBOOT_ROMSIZE_KB_1024 - #define BIOS_SIZE BIOS_SIZE_1M -#elif CONFIG_COREBOOT_ROMSIZE_KB_2048 == 1 - #define BIOS_SIZE BIOS_SIZE_2M -#elif CONFIG_COREBOOT_ROMSIZE_KB_4096 == 1 - #define BIOS_SIZE BIOS_SIZE_4M -#elif CONFIG_COREBOOT_ROMSIZE_KB_8192 == 1 - #define BIOS_SIZE BIOS_SIZE_8M -#endif + * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M + * + * In Hudson-2, default ROM size is 1M Bytes, if your platform ROM + * bigger than 1M you have to set the ROM size outside CIMx module and + * before AGESA module get call. + */ +#ifndef BIOS_SIZE +#define BIOS_SIZE ((CONFIG_COREBOOT_ROMSIZE_KB >> 10) - 1) +#endif /* BIOS_SIZE */ /** * @section SBCIMx_LEGACY_FREE SBCIMx_LEGACY_FREE diff --git a/src/mainboard/amd/union_station/platform_cfg.h b/src/mainboard/amd/union_station/platform_cfg.h index a8888d20d8..151f587e51 100644 --- a/src/mainboard/amd/union_station/platform_cfg.h +++ b/src/mainboard/amd/union_station/platform_cfg.h @@ -22,31 +22,15 @@ #define _PLATFORM_CFG_H_ /** - * @def BIOS_SIZE_1M - * @def BIOS_SIZE_2M - * @def BIOS_SIZE_4M - * @def BIOS_SIZE_8M - */ -#define BIOS_SIZE_1M 0 -#define BIOS_SIZE_2M 1 -#define BIOS_SIZE_4M 3 -#define BIOS_SIZE_8M 7 - -/* In SB800, default ROM size is 1M Bytes, if your platform ROM + * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M + * + * In SB800, default ROM size is 1M Bytes, if your platform ROM * bigger than 1M you have to set the ROM size outside CIMx module and * before AGESA module get call. */ #ifndef BIOS_SIZE -#if CONFIG_COREBOOT_ROMSIZE_KB_1024 - #define BIOS_SIZE BIOS_SIZE_1M -#elif CONFIG_COREBOOT_ROMSIZE_KB_2048 == 1 - #define BIOS_SIZE BIOS_SIZE_2M -#elif CONFIG_COREBOOT_ROMSIZE_KB_4096 == 1 - #define BIOS_SIZE BIOS_SIZE_4M -#elif CONFIG_COREBOOT_ROMSIZE_KB_8192 == 1 - #define BIOS_SIZE BIOS_SIZE_8M -#endif -#endif +#define BIOS_SIZE ((CONFIG_COREBOOT_ROMSIZE_KB >> 10) - 1) +#endif /* BIOS_SIZE */ /** * @def SPREAD_SPECTRUM |