get solo target building with 1.1.5 sources

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1211 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 30 insertions, 27 deletions

diff --git a/src/mainboard/amd/solo/Config.lb b/src/mainboard/amd/solo/Config.lb
index 5426c44b76..8a43951eb6 100644
--- a/src/mainboard/amd/solo/Config.lb
+++ b/src/mainboard/amd/solo/Config.lb
@@ -158,7 +158,7 @@ makerule ./auto.E
 end
 makerule ./auto.inc 
 	depends "./auto.E ./romcc"
-	action	"./romcc -mcpu=k8  -O ./auto.E > auto.inc"
+	action	"./romcc -mcpu=k8  -O2 ./auto.E > auto.inc"
 end
 
 ##
@@ -228,31 +228,35 @@ northbridge amd/amdk8 "mc0"
 	pci 0:18.1
 	pci 0:18.2
 	pci 0:18.3
-	southbridge amd/amd8111 "amd8111"
+	southbridge amd/amd8111 "amd8111" link 0
 		pci 0:0.0
-		pci 0:1.0
-		pci 0:1.1
-		pci 0:1.2
-		pci 0:1.3
-		pci 0:1.5
-		pci 0:1.6
-		superio NSC/pc87360
-			pnp 1:2e.0
-			pnp 1:2e.1
-			pnp 1:2e.2
-			pnp 1:2e.3
-			pnp 1:2e.4
-			pnp 1:2e.5
-			pnp 1:2e.6
-			pnp 1:2e.7
-			pnp 1:2e.8
-			pnp 1:2e.9
-			pnp 1:2e.a
+		pci 0:1.0 on
+		pci 0:1.1 on
+		pci 0:1.2 on
+		pci 0:1.3 on
+		pci 0:1.5 off
+		pci 0:1.6 off
+		pci 1:0.0 on
+		pci 1:0.1 on
+		pci 1:0.2 on
+		pci 1:1.0 off
+		superio NSC/pc87360 link 1
+			pnp 2e.0
+			pnp 2e.1
+			pnp 2e.2
+			pnp 2e.3
+			pnp 2e.4
+			pnp 2e.5
+			pnp 2e.6
+			pnp 2e.7
+			pnp 2e.8
+			pnp 2e.9
+			pnp 2e.a
 			register "com1" = "{1, 0, 0x3f8, 4}"
 			register "lpt" = "{1}"
 		end
 	end
-	southbridge amd/amd8151 "amd8151"
+	southbridge amd/amd8151 "amd8151" link 1
 		pci 0:0.0
 		pci 0:1.0
 	end
diff --git a/src/mainboard/amd/solo/auto.c b/src/mainboard/amd/solo/auto.c
index 27b476c19c..12ed6f146a 100644
--- a/src/mainboard/amd/solo/auto.c
+++ b/src/mainboard/amd/solo/auto.c
@@ -17,6 +17,7 @@
 #include "cpu/p6/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "debug.c"
+#include "northbridge/amd/amdk8/cpu_rev.c"
 
 #define SIO_BASE 0x2e
 
@@ -53,9 +54,6 @@ static void coherent_ht_mainboard(unsigned cpus)
 {
 }
 
-#include "northbridge/amd/amdk8/cpu_ldtstop.c"
-#include "southbridge/amd/amd8111/amd8111_ldtstop.c"
-
 #include "northbridge/amd/amdk8/raminit.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
 #include "sdram/generic_sdram.c"
@@ -138,11 +136,12 @@ static void main(void)
 	enable_lapic();
 	init_timer();
 
-	/* Solo boards only have 1 CPU, this check is not needed!? */
+#if 0
+	/* Enabling this will make romcc segfault - 2003/10/13 */
 	if (!boot_cpu()) {
-		notify_bsp_ap_is_stopped();
-		stop_this_cpu();
+		print_err("This LinuxBIOS image is built for UP only.\n");
 	}
+#endif
 
 	pc87360_enable_serial();