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| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-10-01 14:50:12 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-10-01 14:50:12 +0000 |
| commit | e82618d03719e1c3f012b6ac227aa4b34ae4950b (patch) | |
| tree | 8b346ea13157962dc040299579101958b9fe738f /src/mainboard/amd | |
| parent | f11b81d18d36ecf732452a861d79ecd75f380adc (diff) | |
| download | coreboot-e82618d03719e1c3f012b6ac227aa4b34ae4950b.tar.xz | |
Move CACHE_AS_RAM_ADDRESS_DEBUG out of romstage.c into Kconfig,
rename it slightly, make it visible only on relevant northbridges,
drop it entirely from via boards (as they seem to have picked it
up from AMD code without using it themselves), and make it
default to false for all boards.
Some romstages used to set this to "true" (ie. "print debug output"),
but I didn't follow up on it in Kconfig - if you need it to debug CAR,
enable it yourself.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5898 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd')
| -rw-r--r-- | src/mainboard/amd/mahogany_fam10/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/amd/serengeti_cheetah/ap_romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/amd/serengeti_cheetah/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/amd/serengeti_cheetah_fam10/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/amd/tilapia_fam10/romstage.c | 1 |
5 files changed, 0 insertions, 5 deletions
diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index d7f8cb9c48..6f47f66283 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -22,7 +22,6 @@ //#define SYSTEM_TYPE 2 /* MOBILE */ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 1 #define SET_NB_CFG_54 1 diff --git a/src/mainboard/amd/serengeti_cheetah/ap_romstage.c b/src/mainboard/amd/serengeti_cheetah/ap_romstage.c index 5a9d7049dd..d8539932b2 100644 --- a/src/mainboard/amd/serengeti_cheetah/ap_romstage.c +++ b/src/mainboard/amd/serengeti_cheetah/ap_romstage.c @@ -2,7 +2,6 @@ #define __PRE_RAM__ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c index 65cabe9a4f..fed8d6a6c3 100644 --- a/src/mainboard/amd/serengeti_cheetah/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah/romstage.c @@ -1,5 +1,4 @@ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c index 742700575b..b0a0f08829 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c @@ -22,7 +22,6 @@ //#define SYSTEM_TYPE 2 /* MOBILE */ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 1 #define SET_NB_CFG_54 1 diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c index 2971a7fc8a..3e190fec9c 100644 --- a/src/mainboard/amd/tilapia_fam10/romstage.c +++ b/src/mainboard/amd/tilapia_fam10/romstage.c @@ -22,7 +22,6 @@ //#define SYSTEM_TYPE 2 /* MOBILE */ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 1 #define SET_NB_CFG_54 1 |