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authorAngel Pons <th3fanbus@gmail.com>2020-05-21 15:14:07 +0200
committerNico Huber <nico.h@gmx.de>2020-05-26 11:46:21 +0000
commit7e577ad22f2f7fb6e2fca062f87c93e1c1dc3344 (patch)
tree6c0f03073cc094db0a0f5da292e9bb080e0a878e /src/mainboard/amd
parent5f82370d7bc4ba385ae8911cbfdabd4450f0e944 (diff)
downloadcoreboot-7e577ad22f2f7fb6e2fca062f87c93e1c1dc3344.tar.xz
AGESA f14/f15tn/f16kb: Factor out memory settings
We use the same values everywhere, so we might as well factor them out. TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb mainboards result in identical coreboot binaries. Change-Id: Ie6f166034d5d642dff37730a8d83264fb2e019b4 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41663 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r--src/mainboard/amd/inagua/buildOpts.c11
-rw-r--r--src/mainboard/amd/olivehill/buildOpts.c11
-rw-r--r--src/mainboard/amd/parmer/buildOpts.c11
-rw-r--r--src/mainboard/amd/persimmon/buildOpts.c11
-rw-r--r--src/mainboard/amd/south_station/buildOpts.c11
-rw-r--r--src/mainboard/amd/thatcher/buildOpts.c11
-rw-r--r--src/mainboard/amd/union_station/buildOpts.c11
7 files changed, 0 insertions, 77 deletions
diff --git a/src/mainboard/amd/inagua/buildOpts.c b/src/mainboard/amd/inagua/buildOpts.c
index 4729577be7..1ac2266ab7 100644
--- a/src/mainboard/amd/inagua/buildOpts.c
+++ b/src/mainboard/amd/inagua/buildOpts.c
@@ -191,16 +191,5 @@
#define POWER_DOWN_BY_CHANNEL 0 ///< Channel power down mode
#define POWER_DOWN_BY_CHIP_SELECT 1 ///< Chip select power down mode
-// The following definitions specify the default values for various parameters in which there are
-// no clearly defined defaults to be used in the common file. The values below are based on product
-// and BKDG content, please consult the AGESA Memory team for consultation.
-#define DFLT_SCRUB_DRAM_RATE (0)
-#define DFLT_SCRUB_L2_RATE (0)
-#define DFLT_SCRUB_L3_RATE (0)
-#define DFLT_SCRUB_IC_RATE (0)
-#define DFLT_SCRUB_DC_RATE (0)
-#define DFLT_MEMORY_QUADRANK_TYPE QUADRANK_UNBUFFERED
-#define DFLT_VRM_SLEW_RATE (5000)
-
// Instantiate all solution relevant data.
#include <PlatformInstall.h>
diff --git a/src/mainboard/amd/olivehill/buildOpts.c b/src/mainboard/amd/olivehill/buildOpts.c
index d2bc4e78b8..5ea4c0c81a 100644
--- a/src/mainboard/amd/olivehill/buildOpts.c
+++ b/src/mainboard/amd/olivehill/buildOpts.c
@@ -300,15 +300,4 @@ GPIO_CONTROL olivehill_gpio[] = {
};
//#define BLDCFG_FCH_GPIO_CONTROL_LIST (&olivehill_gpio[0])
-// The following definitions specify the default values for various parameters in which there are
-// no clearly defined defaults to be used in the common file. The values below are based on product
-// and BKDG content, please consult the AGESA Memory team for consultation.
-#define DFLT_SCRUB_DRAM_RATE (0)
-#define DFLT_SCRUB_L2_RATE (0)
-#define DFLT_SCRUB_L3_RATE (0)
-#define DFLT_SCRUB_IC_RATE (0)
-#define DFLT_SCRUB_DC_RATE (0)
-#define DFLT_MEMORY_QUADRANK_TYPE QUADRANK_UNBUFFERED
-#define DFLT_VRM_SLEW_RATE (5000)
-
#include <PlatformInstall.h>
diff --git a/src/mainboard/amd/parmer/buildOpts.c b/src/mainboard/amd/parmer/buildOpts.c
index a3cbb7e4f7..05ac8c6dd3 100644
--- a/src/mainboard/amd/parmer/buildOpts.c
+++ b/src/mainboard/amd/parmer/buildOpts.c
@@ -302,15 +302,4 @@ GPIO_CONTROL parmer_gpio[] = {
};
#define BLDCFG_FCH_GPIO_CONTROL_LIST (&parmer_gpio[0])
-// The following definitions specify the default values for various parameters in which there are
-// no clearly defined defaults to be used in the common file. The values below are based on product
-// and BKDG content, please consult the AGESA Memory team for consultation.
-#define DFLT_SCRUB_DRAM_RATE (0)
-#define DFLT_SCRUB_L2_RATE (0)
-#define DFLT_SCRUB_L3_RATE (0)
-#define DFLT_SCRUB_IC_RATE (0)
-#define DFLT_SCRUB_DC_RATE (0)
-#define DFLT_MEMORY_QUADRANK_TYPE QUADRANK_UNBUFFERED
-#define DFLT_VRM_SLEW_RATE (5000)
-
#include <PlatformInstall.h>
diff --git a/src/mainboard/amd/persimmon/buildOpts.c b/src/mainboard/amd/persimmon/buildOpts.c
index 5f18c39e97..66d1a74b3d 100644
--- a/src/mainboard/amd/persimmon/buildOpts.c
+++ b/src/mainboard/amd/persimmon/buildOpts.c
@@ -191,16 +191,5 @@
#define POWER_DOWN_BY_CHANNEL 0 ///< Channel power down mode
#define POWER_DOWN_BY_CHIP_SELECT 1 ///< Chip select power down mode
-// The following definitions specify the default values for various parameters in which there are
-// no clearly defined defaults to be used in the common file. The values below are based on product
-// and BKDG content, please consult the AGESA Memory team for consultation.
-#define DFLT_SCRUB_DRAM_RATE (0)
-#define DFLT_SCRUB_L2_RATE (0)
-#define DFLT_SCRUB_L3_RATE (0)
-#define DFLT_SCRUB_IC_RATE (0)
-#define DFLT_SCRUB_DC_RATE (0)
-#define DFLT_MEMORY_QUADRANK_TYPE QUADRANK_UNBUFFERED
-#define DFLT_VRM_SLEW_RATE (5000)
-
// Instantiate all solution relevant data.
#include <PlatformInstall.h>
diff --git a/src/mainboard/amd/south_station/buildOpts.c b/src/mainboard/amd/south_station/buildOpts.c
index d3d65713cb..29668bcc87 100644
--- a/src/mainboard/amd/south_station/buildOpts.c
+++ b/src/mainboard/amd/south_station/buildOpts.c
@@ -191,16 +191,5 @@
#define POWER_DOWN_BY_CHANNEL 0 ///< Channel power down mode
#define POWER_DOWN_BY_CHIP_SELECT 1 ///< Chip select power down mode
-// The following definitions specify the default values for various parameters in which there are
-// no clearly defined defaults to be used in the common file. The values below are based on product
-// and BKDG content, please consult the AGESA Memory team for consultation.
-#define DFLT_SCRUB_DRAM_RATE (0)
-#define DFLT_SCRUB_L2_RATE (0)
-#define DFLT_SCRUB_L3_RATE (0)
-#define DFLT_SCRUB_IC_RATE (0)
-#define DFLT_SCRUB_DC_RATE (0)
-#define DFLT_MEMORY_QUADRANK_TYPE QUADRANK_UNBUFFERED
-#define DFLT_VRM_SLEW_RATE (5000)
-
// Instantiate all solution relevant data.
#include <PlatformInstall.h>
diff --git a/src/mainboard/amd/thatcher/buildOpts.c b/src/mainboard/amd/thatcher/buildOpts.c
index 53929b8f35..a97e8f0952 100644
--- a/src/mainboard/amd/thatcher/buildOpts.c
+++ b/src/mainboard/amd/thatcher/buildOpts.c
@@ -302,15 +302,4 @@ GPIO_CONTROL thatcher_gpio[] = {
};
#define BLDCFG_FCH_GPIO_CONTROL_LIST (&thatcher_gpio[0])
-// The following definitions specify the default values for various parameters in which there are
-// no clearly defined defaults to be used in the common file. The values below are based on product
-// and BKDG content, please consult the AGESA Memory team for consultation.
-#define DFLT_SCRUB_DRAM_RATE (0)
-#define DFLT_SCRUB_L2_RATE (0)
-#define DFLT_SCRUB_L3_RATE (0)
-#define DFLT_SCRUB_IC_RATE (0)
-#define DFLT_SCRUB_DC_RATE (0)
-#define DFLT_MEMORY_QUADRANK_TYPE QUADRANK_UNBUFFERED
-#define DFLT_VRM_SLEW_RATE (5000)
-
#include <PlatformInstall.h>
diff --git a/src/mainboard/amd/union_station/buildOpts.c b/src/mainboard/amd/union_station/buildOpts.c
index d3d65713cb..29668bcc87 100644
--- a/src/mainboard/amd/union_station/buildOpts.c
+++ b/src/mainboard/amd/union_station/buildOpts.c
@@ -191,16 +191,5 @@
#define POWER_DOWN_BY_CHANNEL 0 ///< Channel power down mode
#define POWER_DOWN_BY_CHIP_SELECT 1 ///< Chip select power down mode
-// The following definitions specify the default values for various parameters in which there are
-// no clearly defined defaults to be used in the common file. The values below are based on product
-// and BKDG content, please consult the AGESA Memory team for consultation.
-#define DFLT_SCRUB_DRAM_RATE (0)
-#define DFLT_SCRUB_L2_RATE (0)
-#define DFLT_SCRUB_L3_RATE (0)
-#define DFLT_SCRUB_IC_RATE (0)
-#define DFLT_SCRUB_DC_RATE (0)
-#define DFLT_MEMORY_QUADRANK_TYPE QUADRANK_UNBUFFERED
-#define DFLT_VRM_SLEW_RATE (5000)
-
// Instantiate all solution relevant data.
#include <PlatformInstall.h>