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authorAngel Pons <th3fanbus@gmail.com>2020-05-20 23:19:17 +0200
committerNico Huber <nico.h@gmx.de>2020-05-26 11:31:57 +0000
commit927f6ae84a7b59b630250a7e559aac1eb05ae2f5 (patch)
treea88e11d08b70b07e91504281cfb9fe633e604ad5 /src/mainboard/amd
parent477b4f8886bd5bca8a6c26035e0ab20a8709298a (diff)
downloadcoreboot-927f6ae84a7b59b630250a7e559aac1eb05ae2f5.tar.xz
mb/*/*/buildOpts.c: Drop BLDCFG_IR_PIN_CONTROL
This does not exist anywhere in the entire coreboot tree. Drop it. TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb mainboards result in identical coreboot binaries. Change-Id: I80320a20f4b44896e72d701a1d98786cb3a93dcc Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41588 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mike Banon <mikebdp2@gmail.com> Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r--src/mainboard/amd/olivehill/buildOpts.c1
-rw-r--r--src/mainboard/amd/parmer/buildOpts.c1
-rw-r--r--src/mainboard/amd/thatcher/buildOpts.c1
3 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/amd/olivehill/buildOpts.c b/src/mainboard/amd/olivehill/buildOpts.c
index 78a5596b93..fd61756a23 100644
--- a/src/mainboard/amd/olivehill/buildOpts.c
+++ b/src/mainboard/amd/olivehill/buildOpts.c
@@ -306,7 +306,6 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#define DFLT_FCH_GPP_PORT1_HOTPLUG FALSE
#define DFLT_FCH_GPP_PORT2_HOTPLUG FALSE
#define DFLT_FCH_GPP_PORT3_HOTPLUG FALSE
-//#define BLDCFG_IR_PIN_CONTROL 0x33
GPIO_CONTROL olivehill_gpio[] = {
{183, Function1, GpioIn | GpioOutEnB | PullUpB},
diff --git a/src/mainboard/amd/parmer/buildOpts.c b/src/mainboard/amd/parmer/buildOpts.c
index bf610672ba..c46657df02 100644
--- a/src/mainboard/amd/parmer/buildOpts.c
+++ b/src/mainboard/amd/parmer/buildOpts.c
@@ -307,7 +307,6 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define DFLT_FCH_GPP_PORT1_HOTPLUG FALSE
#define DFLT_FCH_GPP_PORT2_HOTPLUG FALSE
#define DFLT_FCH_GPP_PORT3_HOTPLUG FALSE
-//#define BLDCFG_IR_PIN_CONTROL 0x33
GPIO_CONTROL parmer_gpio[] = {
{183, Function1, GpioIn | GpioOutEnB | PullUpB},
diff --git a/src/mainboard/amd/thatcher/buildOpts.c b/src/mainboard/amd/thatcher/buildOpts.c
index de1f89fb0a..915f792159 100644
--- a/src/mainboard/amd/thatcher/buildOpts.c
+++ b/src/mainboard/amd/thatcher/buildOpts.c
@@ -307,7 +307,6 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define DFLT_FCH_GPP_PORT1_HOTPLUG FALSE
#define DFLT_FCH_GPP_PORT2_HOTPLUG FALSE
#define DFLT_FCH_GPP_PORT3_HOTPLUG FALSE
-//#define BLDCFG_IR_PIN_CONTROL 0x33
#define FCH_NO_XHCI_SUPPORT TRUE
GPIO_CONTROL thatcher_gpio[] = {
{183, Function1, PullUpB},