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authorKyösti Mälkki <kyosti.malkki@gmail.com>2012-07-11 08:03:13 +0300
committerPatrick Georgi <patrick@georgi-clan.de>2012-07-16 18:46:33 +0200
commitba589e3630b0e3259b1f3d54434589e76ec48398 (patch)
treeffafff40f2f663cf70a10624bb42c2a2aae80b90 /src/mainboard/amd
parent231f2614021967c9645d9e5b83dbea2089600be3 (diff)
downloadcoreboot-ba589e3630b0e3259b1f3d54434589e76ec48398.tar.xz
Move setup_uma_memory() to K8 northbridge
These boards had identical UMA code: amd/dbm690t amd/pistachio technexion/tim5690 technexion/tim8690 The ones below had whitespace or debug level change compared to the one above: kontron/kt690 siemens/sitemp_g1p1 These boards use AMDFAM10 guidelines in code: asrock/939a785gmh amd/mahogany Change-Id: Id7c3f48035727f5847f2d7c3a6e87a3d15582003 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1210 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r--src/mainboard/amd/dbm690t/mainboard.c41
-rw-r--r--src/mainboard/amd/mahogany/mainboard.c41
-rw-r--r--src/mainboard/amd/pistachio/mainboard.c41
3 files changed, 3 insertions, 120 deletions
diff --git a/src/mainboard/amd/dbm690t/mainboard.c b/src/mainboard/amd/dbm690t/mainboard.c
index c5515b42a6..33f0839597 100644
--- a/src/mainboard/amd/dbm690t/mainboard.c
+++ b/src/mainboard/amd/dbm690t/mainboard.c
@@ -186,46 +186,7 @@ static void dbm690t_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard DBM690T Enable. dev=0x%p\n", dev);
-#if CONFIG_GFXUMA
- msr_t msr, msr2;
-
- /* TOP_MEM: the top of DRAM below 4G */
- msr = rdmsr(TOP_MEM);
- printk(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
- __func__, msr.lo, msr.hi);
-
- /* TOP_MEM2: the top of DRAM above 4G */
- msr2 = rdmsr(TOP_MEM2);
- printk(BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
- __func__, msr2.lo, msr2.hi);
-
- switch (msr.lo) {
- case 0x10000000: /* 256M system memory */
- uma_memory_size = 0x2000000; /* 32M recommended UMA */
- break;
-
- case 0x18000000: /* 384M system memory */
- uma_memory_size = 0x4000000; /* 64M recommended UMA */
- break;
-
- case 0x20000000: /* 512M system memory */
- uma_memory_size = 0x4000000; /* 64M recommended UMA */
- break;
-
- default: /* 1GB and above system memory */
- uma_memory_size = 0x8000000; /* 128M recommended UMA */
- break;
- }
-
- uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
- printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
- __func__, uma_memory_size, uma_memory_base);
-
- /* TODO: TOP_MEM2 */
-#else
- uma_memory_size = 0x8000000; /* 128M recommended UMA */
- uma_memory_base = 0x38000000; /* 1GB system memory supposed */
-#endif
+ setup_uma_memory();
enable_onboard_nic();
get_ide_dma66();
diff --git a/src/mainboard/amd/mahogany/mainboard.c b/src/mainboard/amd/mahogany/mainboard.c
index a263f6eeb4..5cc6c92ca0 100644
--- a/src/mainboard/amd/mahogany/mainboard.c
+++ b/src/mainboard/amd/mahogany/mainboard.c
@@ -102,46 +102,7 @@ u8 is_dev3_present(void)
static void mahogany_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard MAHOGANY Enable. dev=0x%p\n", dev);
-
-#if CONFIG_GFXUMA
- msr_t msr, msr2;
-
- /* TOP_MEM: the top of DRAM below 4G */
- msr = rdmsr(TOP_MEM);
- printk
- (BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
- __func__, msr.lo, msr.hi);
-
- /* TOP_MEM2: the top of DRAM above 4G */
- msr2 = rdmsr(TOP_MEM2);
- printk
- (BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
- __func__, msr2.lo, msr2.hi);
-
- /* refer to UMA Size Consideration in 780 BDG. */
- switch (msr.lo) {
- case 0x10000000: /* 256M system memory */
- uma_memory_size = 0x4000000; /* 64M recommended UMA */
- break;
-
- case 0x20000000: /* 512M system memory */
- uma_memory_size = 0x8000000; /* 128M recommended UMA */
- break;
-
- default: /* 1GB and above system memory */
- uma_memory_size = 0x10000000; /* 256M recommended UMA */
- break;
- }
-
- uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
- printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
- __func__, uma_memory_size, uma_memory_base);
-
- /* TODO: TOP_MEM2 */
-#else
- uma_memory_size = 0x8000000; /* 128M recommended UMA */
- uma_memory_base = 0x38000000; /* 1GB system memory supposed */
-#endif
+ setup_uma_memory();
set_pcie_dereset();
/* get_ide_dma66(); */
diff --git a/src/mainboard/amd/pistachio/mainboard.c b/src/mainboard/amd/pistachio/mainboard.c
index 6f62b58688..dfee58613c 100644
--- a/src/mainboard/amd/pistachio/mainboard.c
+++ b/src/mainboard/amd/pistachio/mainboard.c
@@ -256,46 +256,7 @@ static void pistachio_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard Pistachio Enable. dev=0x%p\n", dev);
-#if CONFIG_GFXUMA
- msr_t msr, msr2;
-
- /* TOP_MEM: the top of DRAM below 4G */
- msr = rdmsr(TOP_MEM);
- printk(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
- __func__, msr.lo, msr.hi);
-
- /* TOP_MEM2: the top of DRAM above 4G */
- msr2 = rdmsr(TOP_MEM2);
- printk(BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
- __func__, msr2.lo, msr2.hi);
-
- switch (msr.lo) {
- case 0x10000000: /* 256M system memory */
- uma_memory_size = 0x2000000; /* 32M recommended UMA */
- break;
-
- case 0x18000000: /* 384M system memory */
- uma_memory_size = 0x4000000; /* 64M recommended UMA */
- break;
-
- case 0x20000000: /* 512M system memory */
- uma_memory_size = 0x4000000; /* 64M recommended UMA */
- break;
-
- default: /* 1GB and above system memory */
- uma_memory_size = 0x8000000; /* 128M recommended UMA */
- break;
- }
-
- uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
- printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
- __func__, uma_memory_size, uma_memory_base);
-
- /* TODO: TOP_MEM2 */
-#else
- uma_memory_size = 0x8000000; /* 128M recommended UMA */
- uma_memory_base = 0x38000000; /* 1GB system memory supposed */
-#endif
+ setup_uma_memory();
enable_onboard_nic();