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authorMyles Watson <mylesgw@gmail.com>2009-10-26 15:14:07 +0000
committerMyles Watson <mylesgw@gmail.com>2009-10-26 15:14:07 +0000
commitd73c1b5bf1246855a4d4e847702214a3eeb6ab82 (patch)
treebd0cbb31eeaad93213abef425135eeaea526a823 /src/mainboard/amd
parent074356ec819be284fb1e8d18a68678b72c5282da (diff)
downloadcoreboot-d73c1b5bf1246855a4d4e847702214a3eeb6ab82.tar.xz
Define some variables that were not defined. There are a couple left.
Do kbuildall then grep not.defined kbuildall.results/* The interesting ones were GENERATE_* I had to put them in twice to make it work correctly: once outside the menu setting the defaults, and once inside the menu. Now they show up when they should, and are always defined Define HAVE_INIT_TIMER to only exclude the three boards that define it to be 0 in newconfig. Define MEM_TRAIN_SEQ to be an integer and set it correctly. Remove CAR_FAM10 and just depend on NORTHBRIDGE_AMD_AMDFAM10 MOVNTI is a performance enhancement, and should default to 0 so it doesn't break boards that forget to define it. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r--src/mainboard/amd/serengeti_cheetah/Kconfig6
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/Kconfig5
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/Options.lb1
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c4
4 files changed, 12 insertions, 4 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah/Kconfig b/src/mainboard/amd/serengeti_cheetah/Kconfig
index 3af08ec046..7804def85e 100644
--- a/src/mainboard/amd/serengeti_cheetah/Kconfig
+++ b/src/mainboard/amd/serengeti_cheetah/Kconfig
@@ -14,7 +14,6 @@ config BOARD_AMD_SERENGETI_CHEETAH
select HAVE_HARD_RESET
select IOAPIC
select LIFT_BSP_APIC_ID
- select MEM_TRAIN_SEQ
select AP_CODE_IN_CAR
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select WAIT_BEFORE_CPUS_INIT
@@ -81,6 +80,11 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
default n
depends on BOARD_AMD_SERENGETI_CHEETAH
+config MEM_TRAIN_SEQ
+ int
+ default 1
+ depends on BOARD_AMD_SERENGETI_CHEETAH
+
config SB_HT_CHAIN_ON_BUS0
int
default 2
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
index ce851e8d9f..9a2ec2d2ec 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
@@ -67,6 +67,11 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
default n
depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+config MEM_TRAIN_SEQ
+ int
+ default 2
+ depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
config SB_HT_CHAIN_ON_BUS0
int
default 2
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
index 2d82dfde4e..35e0965fba 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
@@ -111,7 +111,6 @@ uses CONFIG_WAIT_BEFORE_CPUS_INIT
uses CONFIG_AMDMCT
uses CONFIG_USE_PRINTK_IN_CAR
-uses CONFIG_CAR_FAM10
uses CONFIG_AMD_UCODE_PATCH_FILE
###
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c b/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c
index 25093fd8b1..efdc7316ea 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c
@@ -49,7 +49,7 @@ static void setup_mb_resource_map(void)
* This field defines the upper address bits of a 40 bit address
* that define the end of the DRAM region.
*/
-// PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x44), 0x0000f8f8, 0x00000000, // Don't touch it, we need it for CONFIG_CAR_FAM10
+// PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x44), 0x0000f8f8, 0x00000000, // Don't touch it, we need it for CAR with FAM10
PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x4C), 0x0000f8f8, 0x00000001,
PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x54), 0x0000f8f8, 0x00000002,
PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x5C), 0x0000f8f8, 0x00000003,
@@ -87,7 +87,7 @@ static void setup_mb_resource_map(void)
* This field defines the upper address bits of a 40-bit address
* that define the start of the DRAM region.
*/
-// PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x40), 0x0000f8fc, 0x00000000,// don't touch it, we need it for CONFIG_CAR_FAM10
+// PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x40), 0x0000f8fc, 0x00000000,// don't touch it, we need it for CAR with FAM10
PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x48), 0x0000f8fc, 0x00000000,
PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x50), 0x0000f8fc, 0x00000000,
PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x58), 0x0000f8fc, 0x00000000,