AGESA f14/f15tn/f16kb: Deduplicate RAM settings

On AGESA f14/f15tn, various RAM-related options were defined in an enum.
However, the preprocessor mess can't compare enum values. To make AGESA
build, each board redefined them as macros, shadowing the enum elements.
Clean this up by replacing the enums with macros in AGESA headers, and
delete the now-redundant redefinitions from all the mainboards.

Note that AGESA f16kb already uses macros, but each mainboard still had
commented-out definitions. Remove them as well, as they are unnecessary.

TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb
mainboards result in identical coreboot binaries.

Change-Id: Ie1085539013d3ae0363b1596fa48555300e45172
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41666
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

7 files changed, 0 insertions, 177 deletions

diff --git a/src/mainboard/amd/inagua/buildOpts.c b/src/mainboard/amd/inagua/buildOpts.c
index 1ac2266ab7..aecc9a5b08 100644
--- a/src/mainboard/amd/inagua/buildOpts.c
+++ b/src/mainboard/amd/inagua/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"
 
-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY			934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC				2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL				0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT			1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/amd/olivehill/buildOpts.c b/src/mainboard/amd/olivehill/buildOpts.c
index cd2aa2ebd1..f5ac742727 100644
--- a/src/mainboard/amd/olivehill/buildOpts.c
+++ b/src/mainboard/amd/olivehill/buildOpts.c
@@ -205,33 +205,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"
 
-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY   200     ///< DDR 400
-//#define DDR533_FREQUENCY   266     ///< DDR 533
-//#define DDR667_FREQUENCY   333     ///< DDR 667
-//#define DDR800_FREQUENCY   400     ///< DDR 800
-//#define DDR1066_FREQUENCY   533    ///< DDR 1066
-//#define DDR1333_FREQUENCY   667    ///< DDR 1333
-//#define DDR1600_FREQUENCY   800    ///< DDR 1600
-//#define DDR1866_FREQUENCY   933    ///< DDR 1866
-//#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-//#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-//#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/amd/parmer/buildOpts.c b/src/mainboard/amd/parmer/buildOpts.c
index c8af85807e..694eda7a1b 100644
--- a/src/mainboard/amd/parmer/buildOpts.c
+++ b/src/mainboard/amd/parmer/buildOpts.c
@@ -207,33 +207,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"
 
-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY   200     ///< DDR 400
-#define DDR533_FREQUENCY   266     ///< DDR 533
-#define DDR667_FREQUENCY   333     ///< DDR 667
-#define DDR800_FREQUENCY   400     ///< DDR 800
-#define DDR1066_FREQUENCY   533    ///< DDR 1066
-#define DDR1333_FREQUENCY   667    ///< DDR 1333
-#define DDR1600_FREQUENCY   800    ///< DDR 1600
-#define DDR1866_FREQUENCY   933    ///< DDR 1866
-#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/amd/persimmon/buildOpts.c b/src/mainboard/amd/persimmon/buildOpts.c
index 66d1a74b3d..91c2182361 100644
--- a/src/mainboard/amd/persimmon/buildOpts.c
+++ b/src/mainboard/amd/persimmon/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"
 
-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY		934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/amd/south_station/buildOpts.c b/src/mainboard/amd/south_station/buildOpts.c
index 29668bcc87..44248a25e5 100644
--- a/src/mainboard/amd/south_station/buildOpts.c
+++ b/src/mainboard/amd/south_station/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"
 
-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY              200 ///< DDR 400
-#define DDR533_FREQUENCY              266 ///< DDR 533
-#define DDR667_FREQUENCY              333 ///< DDR 667
-#define DDR800_FREQUENCY              400 ///< DDR 800
-#define DDR1066_FREQUENCY             533 ///< DDR 1066
-#define DDR1333_FREQUENCY             667 ///< DDR 1333
-#define DDR1600_FREQUENCY             800 ///< DDR 1600
-#define DDR1866_FREQUENCY             933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY     934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED             0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED             1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO                0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED             1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC            2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL           0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT       1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/amd/thatcher/buildOpts.c b/src/mainboard/amd/thatcher/buildOpts.c
index c4e0fce9a9..f9908ef309 100644
--- a/src/mainboard/amd/thatcher/buildOpts.c
+++ b/src/mainboard/amd/thatcher/buildOpts.c
@@ -207,33 +207,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"
 
-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY   200     ///< DDR 400
-#define DDR533_FREQUENCY   266     ///< DDR 533
-#define DDR667_FREQUENCY   333     ///< DDR 667
-#define DDR800_FREQUENCY   400     ///< DDR 800
-#define DDR1066_FREQUENCY   533    ///< DDR 1066
-#define DDR1333_FREQUENCY   667    ///< DDR 1333
-#define DDR1600_FREQUENCY   800    ///< DDR 1600
-#define DDR1866_FREQUENCY   933    ///< DDR 1866
-#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/amd/union_station/buildOpts.c b/src/mainboard/amd/union_station/buildOpts.c
index 29668bcc87..44248a25e5 100644
--- a/src/mainboard/amd/union_station/buildOpts.c
+++ b/src/mainboard/amd/union_station/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"
 
-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY              200 ///< DDR 400
-#define DDR533_FREQUENCY              266 ///< DDR 533
-#define DDR667_FREQUENCY              333 ///< DDR 667
-#define DDR800_FREQUENCY              400 ///< DDR 800
-#define DDR1066_FREQUENCY             533 ///< DDR 1066
-#define DDR1333_FREQUENCY             667 ///< DDR 1333
-#define DDR1600_FREQUENCY             800 ///< DDR 1600
-#define DDR1866_FREQUENCY             933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY     934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED             0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED             1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO                0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED             1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC            2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL           0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT       1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>