diff options
author | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-03-18 16:46:50 +0000 |
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committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-03-18 16:46:50 +0000 |
commit | 2bd91003413d431f0a4db6c3c6691f4b688cf5c5 (patch) | |
tree | 87928431192b8fea7b5dbc3a32dc67283237d66d /src/mainboard/amd | |
parent | 776b85ba457ff82f795c6c65b5574ef27e611097 (diff) | |
download | coreboot-2bd91003413d431f0a4db6c3c6691f4b688cf5c5.tar.xz |
Rework boolean expression (DeMorgan and all) for
better readability.
Also remove failover.c files in mainboards, as they're
not used anymore (and useless, too)
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5258 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r-- | src/mainboard/amd/dbm690t/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/amd/mahogany/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/amd/mahogany_fam10/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/amd/pistachio/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/amd/serengeti_cheetah/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/amd/serengeti_cheetah_fam10/romstage.c | 2 |
6 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/amd/dbm690t/romstage.c b/src/mainboard/amd/dbm690t/romstage.c index 7f5a2700e7..53e7163e8b 100644 --- a/src/mainboard/amd/dbm690t/romstage.c +++ b/src/mainboard/amd/dbm690t/romstage.c @@ -111,7 +111,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) struct cpuid_result cpuid1; struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); - if (!((cpu_init_detectedx) || (!boot_cpu()))) { + if (!cpu_init_detectedx && boot_cpu()) { /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ enumerate_ht_chain(); diff --git a/src/mainboard/amd/mahogany/romstage.c b/src/mainboard/amd/mahogany/romstage.c index a6d2435e99..c8f63e470a 100644 --- a/src/mainboard/amd/mahogany/romstage.c +++ b/src/mainboard/amd/mahogany/romstage.c @@ -111,7 +111,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) struct cpuid_result cpuid1; struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); - if (!((cpu_init_detectedx) || (!boot_cpu()))) { + if (!cpu_init_detectedx && boot_cpu()) { /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ enumerate_ht_chain(); diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index 5846a79301..ebb47f1cdc 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -156,7 +156,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) u32 val; msr_t msr; - if (!((cpu_init_detectedx) || (!boot_cpu()))) { + if (!cpu_init_detectedx && boot_cpu()) { /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ /* mov bsp to bus 0xff when > 8 nodes */ diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c index 0db2f3413b..3af55eed92 100644 --- a/src/mainboard/amd/pistachio/romstage.c +++ b/src/mainboard/amd/pistachio/romstage.c @@ -107,7 +107,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); - if (!((cpu_init_detectedx) || (!boot_cpu()))) { + if (!cpu_init_detectedx && boot_cpu()) { /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ enumerate_ht_chain(); diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c index 8c6ea9b72a..470a7ee40a 100644 --- a/src/mainboard/amd/serengeti_cheetah/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah/romstage.c @@ -189,7 +189,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) struct cpuid_result cpuid1; #endif - if (!((cpu_init_detectedx) || (!boot_cpu()))) { + if (!cpu_init_detectedx && boot_cpu()) { /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c index 5867fd3506..3e9b7a5941 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c @@ -160,7 +160,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) u32 val; msr_t msr; - if (!((cpu_init_detectedx) || (!boot_cpu()))) { + if (!cpu_init_detectedx && boot_cpu()) { /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ /* mov bsp to bus 0xff when > 8 nodes */ |