diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-06-03 06:12:03 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-06-04 08:46:56 +0000 |
| commit | 564c2191ab5d2c57ce7d3fda9a7596ef3e39b975 (patch) | |
| tree | c21f844d42c7addb874ea83b060e45b785d5cdf5 /src/mainboard/amd | |
| parent | 1bad4ce421188748d1c3dd6bafe3863cbb21dd24 (diff) | |
| download | coreboot-564c2191ab5d2c57ce7d3fda9a7596ef3e39b975.tar.xz | |
sb/amd/rs780: Fix invalid function declarations
Provide empty stub implementations for set_pcie_reset() and
set_pcie_dereset(), many boards do not provide a proper one.
Change-Id: Ia6811442905ef1776fa5a8e3f5d4433e86e42f88
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26776
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/amd')
| -rw-r--r-- | src/mainboard/amd/bimini_fam10/mainboard.c | 14 | ||||
| -rw-r--r-- | src/mainboard/amd/mahogany_fam10/mainboard.c | 6 | ||||
| -rw-r--r-- | src/mainboard/amd/tilapia_fam10/mainboard.c | 7 |
3 files changed, 6 insertions, 21 deletions
diff --git a/src/mainboard/amd/bimini_fam10/mainboard.c b/src/mainboard/amd/bimini_fam10/mainboard.c index b6347ebc37..3fa2405739 100644 --- a/src/mainboard/amd/bimini_fam10/mainboard.c +++ b/src/mainboard/amd/bimini_fam10/mainboard.c @@ -24,9 +24,6 @@ #include <southbridge/amd/sb800/sb800.h> #include "southbridge/amd/rs780/rs780.h" -void set_pcie_dereset(void); -void set_pcie_reset(void); - /* GPIO6. */ static void enable_int_gfx(void) { @@ -58,16 +55,9 @@ static void enable_int_gfx(void) /* * Bimini uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to * pull it up before training the slot. + * + * Old comment says: GPIO 50h to reset PCIe slot. ***/ -void set_pcie_dereset(void) -{ - /* GPIO 50h reset PCIe slot */ -} - -void set_pcie_reset(void) -{ - /* GPIO 50h reset PCIe slot */ -} int is_dev3_present(void) { diff --git a/src/mainboard/amd/mahogany_fam10/mainboard.c b/src/mainboard/amd/mahogany_fam10/mainboard.c index 53a8290685..a4a26e026c 100644 --- a/src/mainboard/amd/mahogany_fam10/mainboard.c +++ b/src/mainboard/amd/mahogany_fam10/mainboard.c @@ -24,13 +24,11 @@ #include "southbridge/amd/sb700/smbus.h" #include "southbridge/amd/rs780/rs780.h" -void set_pcie_dereset(void); -void set_pcie_reset(void); /* * Mahogany uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to * pull it up before training the slot. ***/ -void set_pcie_dereset() +void set_pcie_dereset(void) { u16 word; struct device *sm_dev; @@ -43,7 +41,7 @@ void set_pcie_dereset() pci_write_config16(sm_dev, 0xA8, word); } -void set_pcie_reset() +void set_pcie_reset(void) { u16 word; struct device *sm_dev; diff --git a/src/mainboard/amd/tilapia_fam10/mainboard.c b/src/mainboard/amd/tilapia_fam10/mainboard.c index e8a08a53c1..44c1df69ba 100644 --- a/src/mainboard/amd/tilapia_fam10/mainboard.c +++ b/src/mainboard/amd/tilapia_fam10/mainboard.c @@ -34,10 +34,7 @@ #define ADT7461_write_byte(address, val) \ do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val) -void set_pcie_dereset(void); -void set_pcie_reset(void); - -void set_pcie_dereset() +void set_pcie_dereset(void) { u8 byte; u16 word; @@ -62,7 +59,7 @@ void set_pcie_dereset() pci_write_config16(sm_dev, 0x7e, word); } -void set_pcie_reset() +void set_pcie_reset(void) { u8 byte; u16 word; |