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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-09 10:43:49 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-09 10:43:49 +0000 |
| commit | 853263b963b4cacb4f7fa3a7f2c68dcbd094f1d7 (patch) | |
| tree | 322a20f4e96fe251fa65fcdcaab59a41e4480596 /src/mainboard/amd | |
| parent | 10b29d8cfe60891851817e81b6e705da6c6d4534 (diff) | |
| download | coreboot-853263b963b4cacb4f7fa3a7f2c68dcbd094f1d7.tar.xz | |
copy_and_run.c is not needed twice, and it is used on non-car too.
So move it to src/arch/i386/lib/cbfs_and_run.c
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5387 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd')
| -rw-r--r-- | src/mainboard/amd/dbm690t/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/mahogany/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/mahogany_fam10/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/pistachio/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/serengeti_cheetah/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/serengeti_cheetah_fam10/romstage.c | 2 |
6 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/amd/dbm690t/romstage.c b/src/mainboard/amd/dbm690t/romstage.c index 9ce0dbb7c0..802f0ae08c 100644 --- a/src/mainboard/amd/dbm690t/romstage.c +++ b/src/mainboard/amd/dbm690t/romstage.c @@ -88,7 +88,7 @@ static inline int spd_read_byte(u32 device, u32 address) #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/amd/mahogany/romstage.c b/src/mainboard/amd/mahogany/romstage.c index 403a795047..513376b497 100644 --- a/src/mainboard/amd/mahogany/romstage.c +++ b/src/mainboard/amd/mahogany/romstage.c @@ -88,7 +88,7 @@ static inline int spd_read_byte(u32 device, u32 address) #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index 40268241a2..18649f79cd 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -99,7 +99,7 @@ static int spd_read_byte(u32 device, u32 address) #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_10xxx/init_cpus.c" #include "cpu/amd/model_10xxx/fidvid.c" diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c index e84505493f..85b833f21f 100644 --- a/src/mainboard/amd/pistachio/romstage.c +++ b/src/mainboard/amd/pistachio/romstage.c @@ -82,7 +82,7 @@ static inline int spd_read_byte(u32 device, u32 address) #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c index bf1d8bf4f6..9b482e4578 100644 --- a/src/mainboard/amd/serengeti_cheetah/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah/romstage.c @@ -128,7 +128,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #define DIMM6 0x56 #define DIMM7 0x57 -#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c index 495f3a8582..5dc149e70f 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c @@ -117,7 +117,7 @@ static int spd_read_byte(u32 device, u32 address) #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/copy_and_run.c" + #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_10xxx/init_cpus.c" #include "cpu/amd/model_10xxx/fidvid.c" |