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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2012-04-11 12:19:03 +0300 |
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committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-04-12 10:27:34 +0200 |
commit | 3aff1a32087137169fb4165eb2dd11655de27f45 (patch) | |
tree | f355095bdb44c137fb2de9eece16e8f366ebe9ff /src/mainboard/aopen/dxplplusu/acpi/e7505_sec.asl | |
parent | eb59636cc5875bac98a949f206e5f8c0462be238 (diff) | |
download | coreboot-3aff1a32087137169fb4165eb2dd11655de27f45.tar.xz |
Convert AOpen DXPL Plus mainboard to CAR
Tested on real hardware, mainboard with dual Xeon P4 HT CPUs
requires cache-as-ram init code with AP SIPI protocol.
Also enable 2nd CPU and PATA and clean-up Kconfig and ACPI.
Change-Id: I415482f3af22df79d82492c49aed83549f29aa56
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/886
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/aopen/dxplplusu/acpi/e7505_sec.asl')
-rw-r--r-- | src/mainboard/aopen/dxplplusu/acpi/e7505_sec.asl | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/mainboard/aopen/dxplplusu/acpi/e7505_sec.asl b/src/mainboard/aopen/dxplplusu/acpi/e7505_sec.asl index 0effe9367d..463b6be2f1 100644 --- a/src/mainboard/aopen/dxplplusu/acpi/e7505_sec.asl +++ b/src/mainboard/aopen/dxplplusu/acpi/e7505_sec.asl @@ -44,8 +44,8 @@ Name (PBRS, ResourceTemplate () /* Top Of Lowmemory to IOAPIC */ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, - 0x00000000, 0x02000000, 0xFEBFFFFF, - 0x00000000, 0xFCC00000, ,, _Y08, AddressRangeMemory, TypeStatic) + 0x00000000, 0x00000000, 0xFEBFFFFF, + 0x00000000, IO_APIC_ADDR, ,, _Y08, AddressRangeMemory, TypeStatic) }) @@ -54,11 +54,13 @@ Method (_CRS, 0, NotSerialized) /* Top Of Lowmemory to IOAPIC */ CreateDWordField (PBRS, \_SB.PCI0._Y08._MIN, MEML) + CreateDWordField (PBRS, \_SB.PCI0._Y08._MAX, MEMH) CreateDWordField (PBRS, \_SB.PCI0._Y08._LEN, LENM) And (\_SB.PCI0.TOLM, 0xF800, Local1) ShiftRight (Local1, 0x04, Local1) ShiftLeft (Local1, 0x14, MEML) - Subtract (0xFEC00000, MEML, LENM) + Subtract (IO_APIC_ADDR, 0x01, MEMH) + Subtract (IO_APIC_ADDR, MEML, LENM) Return (PBRS) } |