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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-16 14:02:25 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-18 19:03:22 +0000
commit157b189f6b97b6e9ecd8d29edbbd045fbbc231f5 (patch)
tree4562bd212e40d0832fa893935d85a06d82f8a897 /src/mainboard/aopen
parent146c09823333c52e8bbca98465ccc8512ec1daa2 (diff)
downloadcoreboot-157b189f6b97b6e9ecd8d29edbbd045fbbc231f5.tar.xz
cpu/intel: Enter romstage without BIST
When entry to romstage is via cpu/intel/car/romstage.c BIST has not been passed down the path for sometime. Change-Id: I345975c53014902269cee21fc393331d33a84dce Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34908 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/aopen')
-rw-r--r--src/mainboard/aopen/dxplplusu/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/aopen/dxplplusu/romstage.c b/src/mainboard/aopen/dxplplusu/romstage.c
index 2929c0dc58..c95eeda358 100644
--- a/src/mainboard/aopen/dxplplusu/romstage.c
+++ b/src/mainboard/aopen/dxplplusu/romstage.c
@@ -26,7 +26,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address);
}
-void mainboard_romstage_entry(unsigned long bist)
+void mainboard_romstage_entry(void)
{
static const struct mem_controller memctrl[] = {
{