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authorScott Radcliffe <sradcliffe@microind.com>2014-10-14 15:40:59 -0400
committerPatrick Georgi <pgeorgi@google.com>2014-10-17 11:27:07 +0200
commitf5fcedfbc4fe4682ac85bac49c62e59b840fb1f1 (patch)
treeb460315cbbfbe23ae8187343d5448886d5b63b70 /src/mainboard/apple/macbook21/acpi
parent08c7018050e5af2c604c7b1ef35a66fb9f1171d5 (diff)
downloadcoreboot-f5fcedfbc4fe4682ac85bac49c62e59b840fb1f1.tar.xz
drivers/spi: Add support for Micron N25Q128
Support added for Micron N25Q128 SPI flash, which has the same manufacturer id as ST Micro. Jedec ID = 0x20 0xBB 0x18. Since existing stmicro.c only compares the last device id byte, this flash is mistakenly identified as M25P128, which has ID = 0x20 0x20 0x18. To handle this situation and avoid breaking code for existing devices, a two byte .id member is added. New devices should be added to the beginning of the flash table array with .idcode = STM_ID_USE_ALT_ID and .id = the two byte jedec device id. A 4KB subsector erase capability is added and used for this new device. It requires using a different SPI op-code supported by adding .op_erase member. Previous devices defined in stmicro.c are assigned their original op-code for 64KB sector erase. N25Q128 is now working on a custom designed Bayley Bay based board. Tested by verifying the MRC fastboot cache is successfully (re)written. Note that previous devices were not retested. Change-Id: Ic63d86958bf8d301898a157b435f549a0dd9893c Signed-off-by: Scott Radcliffe <sradcliffe@microind.com> Reviewed-on: http://review.coreboot.org/7077 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins)
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