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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-12-29 11:32:27 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-04-28 07:58:50 +0200 |
| commit | 189f3ba974df8f1b305cfa421a151fe069fc1a6f (patch) | |
| tree | c6c82c0b47681294bb74a6a844a2f3234d8c86fb /src/mainboard/apple | |
| parent | 05a8472900ab2a57218b5f3affdaad1df10ed44e (diff) | |
| download | coreboot-189f3ba974df8f1b305cfa421a151fe069fc1a6f.tar.xz | |
x60,t60,x201,macbook21 : Declare GPIs for EC
For lenovo/x201, this also changes GPI_ROUT (0xb8-0xbb)
programming to use GPI1 between SCI/SMI modes, while
previous programming was for GPI12.
Change-Id: I3ac0feaa1d10c8f0e53a5fa5af72366503bb5d2d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-on: http://review.coreboot.org/8656
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/apple')
| -rw-r--r-- | src/mainboard/apple/macbook21/smihandler.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/mainboard/apple/macbook21/smihandler.c b/src/mainboard/apple/macbook21/smihandler.c index 449e36777e..f90bb38336 100644 --- a/src/mainboard/apple/macbook21/smihandler.c +++ b/src/mainboard/apple/macbook21/smihandler.c @@ -27,6 +27,8 @@ #include <pc80/mc146818rtc.h> #include <delay.h> +#define GPE_EC_SCI 12 + /* The southbridge SMI handler checks whether gnvs has a * valid pointer before calling the trap handler */ @@ -69,7 +71,7 @@ int mainboard_smi_apmc(u8 data) switch(data) { case APM_CNT_ACPI_ENABLE: /* route H8SCI to SCI */ - outw(inw(pmbase + ALT_GP_SMI_EN) & ~0x1000, pmbase + ALT_GP_SMI_EN); + outw(inw(pmbase + ALT_GP_SMI_EN) & ~(1<<GPE_EC_SCI), pmbase + ALT_GP_SMI_EN); tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb); tmp &= ~0x03; tmp |= 0x02; @@ -77,7 +79,7 @@ int mainboard_smi_apmc(u8 data) break; case APM_CNT_ACPI_DISABLE: /* route H8SCI# to SMI */ - outw(inw(pmbase + ALT_GP_SMI_EN) | 0x1000, pmbase + ALT_GP_SMI_EN); + outw(inw(pmbase + ALT_GP_SMI_EN) | (1<<GPE_EC_SCI), pmbase + ALT_GP_SMI_EN); tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb); tmp &= ~0x03; tmp |= 0x01; |