summaryrefslogtreecommitdiff
path: root/src/mainboard/apple
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2019-01-19 08:39:07 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-03-18 09:15:59 +0000
commitd889508f16573d85ef5fff4dc231d846dc41e3b5 (patch)
treecda714c31bdd9d0fe4cfa435964b1d7d46f5b8d6 /src/mainboard/apple
parent3449fafec3123e4bdf117c79e15dfd74bc695e27 (diff)
downloadcoreboot-d889508f16573d85ef5fff4dc231d846dc41e3b5.tar.xz
mb/(ICH7): Remove initialization already done at early_init.c
V1CAP is a write-once register, and it is already programmed in intel/i945/early_init.c. Tested on 945G-M4 board (i945G + 82801GB). Change-Id: I4469cb7505d584f10c98aec579a2d78bf1950bf3 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31004 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/apple')
-rw-r--r--src/mainboard/apple/macbook21/romstage.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/apple/macbook21/romstage.c b/src/mainboard/apple/macbook21/romstage.c
index 570360d5a7..63042f60b0 100644
--- a/src/mainboard/apple/macbook21/romstage.c
+++ b/src/mainboard/apple/macbook21/romstage.c
@@ -143,8 +143,6 @@ static void rcba_config(void)
{
/* V0CTL Virtual Channel 0 Resource Control */
RCBA32(0x0014) = 0x80000001;
- /* V1CAP Virtual Channel 1 Resource Capability */
- RCBA32(0x001c) = 0x03128010;
/* Device 1f interrupt pin register */
RCBA32(0x3100) = 0x00042210;