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authorJason Schildt <jschildt@gmail.com>2005-08-10 15:16:44 +0000
committerJason Schildt <jschildt@gmail.com>2005-08-10 15:16:44 +0000
commit043b409904c8663a2df1f651a91da6366eff6c9b (patch)
tree43be72a4df1429321c87e3c65c372e8ab1d45347 /src/mainboard/arima/hdama/failover.c
parent27b85118807be6e2fbf9bbd65d119538ff276db8 (diff)
downloadcoreboot-043b409904c8663a2df1f651a91da6366eff6c9b.tar.xz
Undoing all HDAMA commits from LNXI from r2005->2003
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2006 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/arima/hdama/failover.c')
-rw-r--r--src/mainboard/arima/hdama/failover.c15
1 files changed, 12 insertions, 3 deletions
diff --git a/src/mainboard/arima/hdama/failover.c b/src/mainboard/arima/hdama/failover.c
index f5b1812288..139862c767 100644
--- a/src/mainboard/arima/hdama/failover.c
+++ b/src/mainboard/arima/hdama/failover.c
@@ -9,20 +9,23 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
-#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
static unsigned long main(unsigned long bist)
{
+ unsigned nodeid;
+
/* Make cerain my local apic is useable */
enable_lapic();
+ nodeid = lapicid() & 0xf;
+
/* Is this a cpu only reset? */
- if (early_mtrr_init_detected()) {
+ if (cpu_init_detected(nodeid)) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto fallback_image;
+ goto cpu_reset;
}
}
/* Is this a secondary cpu? */
@@ -59,6 +62,12 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
+ cpu_reset:
+ asm volatile ("jmp __cpu_reset"
+ : /* outputs */
+ : "a"(bist) /* inputs */
+ : /* clobbers */
+ );
fallback_image:
return bist;
}