diff options
| author | Eric Biederman <ebiederm@xmission.com> | 2003-10-11 06:20:25 +0000 |
|---|---|---|
| committer | Eric Biederman <ebiederm@xmission.com> | 2003-10-11 06:20:25 +0000 |
| commit | 83b991afff40e12a8b6756af06a472842edb1a66 (patch) | |
| tree | a441ff0d88afcb0a07cf22dc3653db3e07a05c98 /src/mainboard/arima/hdama/failover.c | |
| parent | 080038bfbd8fdf08bac12476a3789495e6f705ca (diff) | |
| download | coreboot-83b991afff40e12a8b6756af06a472842edb1a66.tar.xz | |
- O2, enums, and switch statements work in romcc
- Support for compiling romcc on non x86 platforms
- new romc options -msse and -mmmx for specifying extra registers to use
- Bug fixes to device the device disable/enable framework and an amd8111 implementation
- Move the link specification to the chip specification instead of the path
- Allow specifying devices with internal bridges.
- Initial via epia support
- Opteron errata fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/arima/hdama/failover.c')
| -rw-r--r-- | src/mainboard/arima/hdama/failover.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/arima/hdama/failover.c b/src/mainboard/arima/hdama/failover.c index 8eeeaef7e1..bd9c17020e 100644 --- a/src/mainboard/arima/hdama/failover.c +++ b/src/mainboard/arima/hdama/failover.c @@ -27,6 +27,10 @@ static void main(void) asm("jmp __cpu_reset"); } } + /* Is this a deliberate reset by the bios */ + else if (bios_reset_detected() && last_boot_normal()) { + asm("jmp __normal_image"); + } /* Is this a secondary cpu? */ else if (!boot_cpu() && last_boot_normal()) { asm("jmp __normal_image"); |