[REMOVAL] arima/hdama

As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: Ic71d8a9137f0bd2a0cc7571a43f9dddb50168d8d
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12368
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)

8 files changed, 0 insertions, 736 deletions

diff --git a/src/mainboard/arima/hdama/Kconfig b/src/mainboard/arima/hdama/Kconfig
deleted file mode 100644
index 66177f5418..0000000000
--- a/src/mainboard/arima/hdama/Kconfig
+++ /dev/null
@@ -1,53 +0,0 @@
-if BOARD_ARIMA_HDAMA
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_AMD_SOCKET_940
-	select NORTHBRIDGE_AMD_AMDK8
-	select SOUTHBRIDGE_AMD_AMD8111
-	select SOUTHBRIDGE_AMD_AMD8131
-	select SUPERIO_NSC_PC87360
-	select HAVE_PIRQ_TABLE
-	select HAVE_OPTION_TABLE
-	select HAVE_MP_TABLE
-	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
-	select BOARD_ROMSIZE_KB_512
-	select QRANK_DIMM_SUPPORT
-
-config MAINBOARD_DIR
-	string
-	default arima/hdama
-
-config APIC_ID_OFFSET
-	hex
-	default 0x0
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "HDAMA"
-
-config HW_MEM_HOLE_SIZEK
-	hex
-	default 0x0
-
-config MAX_CPUS
-	int
-	default 4
-
-config MAX_PHYSICAL_CPUS
-	int
-	default 2
-
-config HT_CHAIN_END_UNITID_BASE
-	hex
-	default 0x20
-
-config HT_CHAIN_UNITID_BASE
-	hex
-	default 0x1
-
-config IRQ_SLOT_COUNT
-	int
-	default 9
-
-endif # BOARD_ARIMA_HDAMA
diff --git a/src/mainboard/arima/hdama/Kconfig.name b/src/mainboard/arima/hdama/Kconfig.name
deleted file mode 100644
index 3f18de8c36..0000000000
--- a/src/mainboard/arima/hdama/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_ARIMA_HDAMA
-	bool "HDAMA"
diff --git a/src/mainboard/arima/hdama/board_info.txt b/src/mainboard/arima/hdama/board_info.txt
deleted file mode 100644
index df4d016049..0000000000
--- a/src/mainboard/arima/hdama/board_info.txt
+++ /dev/null
@@ -1,2 +0,0 @@
-Category: server
-Board URL: http://web.archive.org/web/20080127024444/http://www.arima.com.tw/server/Product/ViewProduct.asp?View=HDAMA
diff --git a/src/mainboard/arima/hdama/cmos.layout b/src/mainboard/arima/hdama/cmos.layout
deleted file mode 100644
index 4e081ea1aa..0000000000
--- a/src/mainboard/arima/hdama/cmos.layout
+++ /dev/null
@@ -1,60 +0,0 @@
-entries
-
-0          384       r       0        reserved_memory
-384          1       e       4        boot_option
-388          4       r       0        reboot_bits
-392          3       e       5        baud_rate
-395          1       e       1        hw_scrubber
-396          1       e       1        interleave_chip_selects
-397          2       e       8        max_mem_clock
-399          1       e       2        multi_core
-400          1       e       1        power_on_after_fail
-412          4       e       6        debug_level
-440          4       e       9        slow_cpu
-444          1       e       1        nmi
-445          1       e       1        iommu
-456          1       e       1        ECC_memory
-728        256       h       0        user_data
-984         16       h       0        check_sum
-# Reserve the extended AMD configuration registers
-1000        24       r       0        amd_reserved
-
-
-
-enumerations
-
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-5     0     115200
-5     1     57600
-5     2     38400
-5     3     19200
-5     4     9600
-5     5     4800
-5     6     2400
-5     7     1200
-6     6     Notice
-6     7     Info
-6     8     Debug
-6     9     Spew
-8     0     DDR400
-8     1     DDR333
-8     2     DDR266
-8     3     DDR200
-9     0     off
-9     1     87.5%
-9     2     75.0%
-9     3     62.5%
-9     4     50.0%
-9     5     37.5%
-9     6     25.0%
-9     7     12.5%
-
-checksums
-
-checksum 392 983 984
diff --git a/src/mainboard/arima/hdama/devicetree.cb b/src/mainboard/arima/hdama/devicetree.cb
deleted file mode 100644
index 5bb966d212..0000000000
--- a/src/mainboard/arima/hdama/devicetree.cb
+++ /dev/null
@@ -1,185 +0,0 @@
-chip northbridge/amd/amdk8/root_complex
-	device cpu_cluster 0 on
-		chip cpu/amd/socket_940
-			device lapic 0 on end
-		end
-	end
-	device domain 0 on
-		subsystemid 0x161f 0x3016 inherit
-		chip northbridge/amd/amdk8
-			device pci 18.0 on #  northbridge
-				#  devices on link 0, link 0 == LDT 0
-				chip southbridge/amd/amd8131
-					# the on/off keyword is mandatory
-					device pci 0.0 on	# PCIX bridge
-						## On board NIC A
-						#chip drivers/generic/generic
-						#	device pci 3.0 on
-						#		irq 0 = 0x13
-						#	end
-						#end
-						## On board NIC B
-						#chip drivers/generic/generic
-						#	device pci 4.0 on
-						#		irq 0 = 0x13
-						#	end
-						#end
-						## PCI Slot 3
-						#chip drivers/generic/generic
-						#	device pci 1.0 on
-						#		irq 0 = 0x11
-						#		irq 1 = 0x12
-						#		irq 2 = 0x13
-						#		irq 3 = 0x10
-						#	end
-						#end
-						## PCI Slot 4
-						#chip drivers/generic/generic
-						#	device pci 2.0 on
-						#		irq 0 = 0x12
-						#		irq 1 = 0x13
-						#		irq 2 = 0x10
-						#		irq 3 = 0x11
-						#	end
-						#end
-					end
-					device pci 0.1 on end	# IOAPIC
-					device pci 1.0 on 	# PCIX bridge
-						## PCI Slot 1
-						#chip drivers/generic/generic
-						#	device pci 1.0 on
-						#		irq 0 = 0x11
-						#		irq 1 = 0x12
-						#		irq 2 = 0x13
-						#		irq 3 = 0x10
-						#	end
-						#end
-						## PCI Slot 2
-						#chip drivers/generic/generic
-						#	device pci 2.0 on
-						#		irq 0 = 0x12
-						#		irq 1 = 0x13
-						#		irq 2 = 0x10
-						#		irq 3 = 0x11
-						#	end
-						#end
-					end
-					device pci 1.1 on end	# IOAPIC
-				end
-				chip southbridge/amd/amd8111
-					# this "device pci 0.0" is the parent of the next one
-					# PCI bridge
-					device pci 0.0 on
-						device pci 0.0 on  end	# USB0
-						device pci 0.1 on  end	# USB1
-						device pci 0.2 off end	# USB 2.0
-						device pci 1.0 off end	# LAN
-						device pci 6.0 on end # ATI Rage XL
-						## PCI Slot 5 (correct?)
-						#chip drivers/generic/generic
-						#	device pci 5.0 on
-						#		irq 0 = 0x11
-						#		irq 1 = 0x12
-						#		irq 2 = 0x13
-						#		irq 3 = 0x10
-						#	end
-						#end
-						## PCI Slot 6 (correct?)
-						#chip drivers/generic/generic
-						#	device pci 4.0 on
-						#		irq 0 = 0x10
-						#		irq 1 = 0x11
-						#		irq 2 = 0x12
-						#		irq 3 = 0x13
-						#	end
-						#end
-
-					end
-					# LPC bridge
-					device pci 1.0 on
-						chip superio/nsc/pc87360
-							device	pnp 2e.0 off  # Floppy
-								 io 0x60 = 0x3f0
-								irq 0x70 = 6
-								drq 0x74 = 2
-							end
-							device pnp 2e.1 off  # Parallel Port
-								 io 0x60 = 0x378
-								irq 0x70 = 7
-							end
-							device pnp 2e.2 off # Com 2
-								 io 0x60 = 0x2f8
-								irq 0x70 = 3
-							end
-							device pnp 2e.3 on  # Com 1
-								 io 0x60 = 0x3f8
-								irq 0x70 = 4
-							end
-							device pnp 2e.4 off end # SWC
-							device pnp 2e.5 off end # Mouse
-							device pnp 2e.6 on  # Keyboard
-								 io 0x60 = 0x60
-								 io 0x62 = 0x64
-								irq 0x70 = 1
-							end
-							device pnp 2e.7 off end # GPIO
-							device pnp 2e.8 off end # ACB
-							device pnp 2e.9 off end # FSCM
-							device pnp 2e.a off end # WDT
-						end
-					end
-					device pci 1.1 on end	# IDE
-					device pci 1.2 on end	# SMBus 2.0
-					device pci 1.3 on 	# System Management
-						chip drivers/generic/generic
-							#phillips pca9545 smbus mux
-							device i2c 70 on
-								# analog_devices adm1026
-								chip drivers/generic/generic
-									device i2c 2c on end
-								end
-							end
-							device i2c 70 on end
-							device i2c 70 on end
-							device i2c 70 on end
-						end
-						chip drivers/generic/generic #dimm 0-0-0
-							device i2c 50 on end
-						end
-						chip drivers/generic/generic #dimm 0-0-1
-							device i2c 51 on end
-						end
-						chip drivers/generic/generic #dimm 0-1-0
-							device i2c 52 on end
-						end
-						chip drivers/generic/generic #dimm 0-1-1
-							device i2c 53 on end
-						end
-						chip drivers/generic/generic #dimm 1-0-0
-							device i2c 54 on end
-						end
-						chip drivers/generic/generic #dimm 1-0-1
-							device i2c 55 on end
-						end
-						chip drivers/generic/generic #dimm 1-1-0
-							device i2c 56 on end
-						end
-						chip drivers/generic/generic #dimm 1-1-1
-							device i2c 57 on end
-						end
-					end
-					device pci 1.5 off end	# AC97 Audio
-					device pci 1.6 on  end	# AC97 Modem
-					register "ide0_enable" = "1"
-					register "ide1_enable" = "1"
-				end
-			end #  device pci 18.0
-
-			device pci 18.0 on end # LDT1
-			device pci 18.0 on end # LDT2
-			device pci 18.1 on end
-			device pci 18.2 on end
-			device pci 18.3 on end
-		end  # chip northbridge/amd/amdk8
-	end
-end
diff --git a/src/mainboard/arima/hdama/irq_tables.c b/src/mainboard/arima/hdama/irq_tables.c
deleted file mode 100644
index 9250d1f584..0000000000
--- a/src/mainboard/arima/hdama/irq_tables.c
+++ /dev/null
@@ -1,48 +0,0 @@
-#include <arch/pirq_routing.h>
-#include <device/pci.h>
-
-#define IRQ_ROUTER_BUS		1
-#define IRQ_ROUTER_DEVFN	PCI_DEVFN(4,3)
-#define IRQ_ROUTER_VENDOR	0x1022
-#define IRQ_ROUTER_DEVICE	0x746b
-
-#define AVAILABLE_IRQS 0xdef8
-#define IRQ_SLOT(slot, bus, dev, fn, linka, linkb, linkc, linkd) \
-	{ bus, (dev<<3)|fn, {{ linka, AVAILABLE_IRQS}, { linkb, AVAILABLE_IRQS}, \
-	{linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
-
-/*  Each IRQ_SLOT entry consists of:
- *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu
- */
-
-static const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,		/* u32 signature */
-	PIRQ_VERSION,           /* u16 version   */
-	32+16*CONFIG_IRQ_SLOT_COUNT,	/* there can be total CONFIG_IRQ_SLOT_COUNT table entries */
-	IRQ_ROUTER_BUS,		/* Where the interrupt router lies (bus) */
-	IRQ_ROUTER_DEVFN,	/* Where the interrupt router lies (dev) */
-	0x00,			/* IRQs devoted exclusively to PCI usage */
-	IRQ_ROUTER_VENDOR,	/* Vendor */
-	IRQ_ROUTER_DEVICE,	/* Device */
-	0x00,			/* Miniport data */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0xb0,           /*  u8 checksum , mod 256 checksum must give zero */
-	{	/* slot(0=onboard), devfn, irqlinks (line id, 0=not routed) */
-		/* PCI Slot 1-6 */
-		IRQ_SLOT(1, 3,1,0, 2,3,4,1 ),
-		IRQ_SLOT(2, 3,2,0, 3,4,1,2 ),
-		IRQ_SLOT(3, 2,1,0, 2,3,4,1 ),
-		IRQ_SLOT(4, 2,2,0, 3,4,1,2 ),
-		IRQ_SLOT(5, 4,5,0, 2,3,4,1 ),
-		IRQ_SLOT(6, 4,4,0, 1,2,3,4 ),
-		/* Onboard NICs */
-		IRQ_SLOT(0, 2,3,0, 4,0,0,0 ),
-		IRQ_SLOT(0, 2,4,0, 4,0,0,0 ),
-		/* Let Linux know about bus 1 */
-		IRQ_SLOT(0, 1,4,3, 0,0,0,0 ),
-	}
-};
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-        return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/arima/hdama/mptable.c b/src/mainboard/arima/hdama/mptable.c
deleted file mode 100644
index d6c3d2f6e8..0000000000
--- a/src/mainboard/arima/hdama/mptable.c
+++ /dev/null
@@ -1,264 +0,0 @@
-#include <console/console.h>
-#include <arch/smp/mpspec.h>
-#include <arch/ioapic.h>
-#include <device/pci.h>
-#include <string.h>
-#include <stdint.h>
-#include <cpu/x86/lapic.h>
-#include <arch/cpu.h>
-#include <arch/io.h>
-
-#define HT_INIT_CONTROL 0x6c
-#define HTIC_BIOSR_Detect  (1<<5)
-
-static unsigned node_link_to_bus(unsigned node, unsigned link)
-{
-	device_t dev;
-	unsigned reg;
-
-	dev = dev_find_slot(0, PCI_DEVFN(0x18, 1));
-	if (!dev) {
-		return 0xff;
-	}
-	for(reg = 0xE0; reg < 0xF0; reg += 0x04) {
-		uint32_t config_map;
-		unsigned dst_node;
-		unsigned dst_link;
-		unsigned bus_base;
-		config_map = pci_read_config32(dev, reg);
-		if ((config_map & 3) != 3) {
-			continue;
-		}
-		dst_node = (config_map >> 4) & 7;
-		dst_link = (config_map >> 8) & 3;
-		bus_base = (config_map >> 16) & 0xff;
-#if 0
-		printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
-			dst_node, dst_link, bus_base,
-			reg, config_map);
-#endif
-		if ((dst_node == node) && (dst_link == link))
-		{
-			return bus_base;
-		}
-	}
-	return 0xff;
-}
-
-static unsigned max_apicid(void)
-{
-	unsigned max;
-	device_t dev;
-	max = 0;
-	for(dev = all_devices; dev; dev = dev->next) {
-		if (dev->path.type != DEVICE_PATH_APIC)
-			continue;
-		if (dev->path.apic.apic_id > max) {
-			max = dev->path.apic.apic_id;
-		}
-	}
-	return max;
-}
-
-static void *smp_write_config_table(void *v)
-{
-	struct mp_config_table *mc;
-	int bus_isa;
-	unsigned char bus_chain_0;
-	unsigned char bus_8131_1;
-	unsigned char bus_8131_2;
-	unsigned char bus_8111_1;
-	unsigned apicid_base;
-	unsigned apicid_8111;
-	unsigned apicid_8131_1;
-	unsigned apicid_8131_2;
-
-	mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
-
-	mptable_init(mc, LOCAL_APIC_ADDR);
-
-	smp_write_processors(mc);
-
-	apicid_base = max_apicid() + 1;
-	apicid_8111 = apicid_base;
-	apicid_8131_1 = apicid_base + 1;
-	apicid_8131_2 = apicid_base + 2;
-	{
-		device_t dev;
-
-		/* HT chain 0 */
-		bus_chain_0 = node_link_to_bus(0, 0);
-		if (bus_chain_0 == 0xff) {
-			printk(BIOS_DEBUG, "ERROR - cound not find bus for node 0 chain 0, using defaults\n");
-			bus_chain_0 = 0;
-		}
-
-		/* 8111 */
-		dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
-		if (dev) {
-			bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-		}
-		else {
-			printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:03.0, using defaults\n", bus_chain_0);
-			bus_8111_1 = 4;
-		}
-		/* 8131-1 */
-		dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
-		if (dev) {
-			bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-		}
-		else {
-			printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_chain_0);
-			bus_8131_1 = 2;
-		}
-		/* 8131-2 */
-		dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x02,0));
-		if (dev) {
-			bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-		}
-		else {
-			printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_chain_0);
-			bus_8131_2 = 3;
-		}
-	}
-
-	mptable_write_buses(mc, NULL, &bus_isa);
-
-	/* IOAPIC handling */
-	smp_write_ioapic(mc, apicid_8111, 0x11, VIO_APIC_VADDR);
-	{
-		device_t dev;
-		struct resource *res;
-		/* 8131 apic 3 */
-		dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,1));
-		if (dev) {
-			res = find_resource(dev, PCI_BASE_ADDRESS_0);
-			if (res) {
-			  smp_write_ioapic(mc, apicid_8131_1, 0x11,
-					   res2mmio(res, 0, 0));
-			}
-		}
-		/* 8131 apic 4 */
-		dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x02,1));
-		if (dev) {
-			res = find_resource(dev, PCI_BASE_ADDRESS_0);
-			if (res) {
-			  smp_write_ioapic(mc, apicid_8131_2, 0x11,
-					   res2mmio(res, 0, 0));
-			}
-		}
-	}
-
-	mptable_add_isa_interrupts(mc, bus_isa, apicid_8111, 0);
-
-	/* Standard local interrupt assignments */
-	mptable_lintsrc(mc, bus_isa);
-
-	/* PCI Ints:	     Type    Trigger                Polarity                 Bus ID      PCIDEVNUM|IRQ  APIC ID PIN# */
-	/* On board nics */
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x03<<2)|0, apicid_8111, 0x13);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x04<<2)|0, apicid_8111, 0x13);
-	/* On board SATA */
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x05<<2)|0, apicid_8111, 0x11);
-
-	/* PCI Slot 1 */
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|0, apicid_8111, 0x11);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|1, apicid_8111, 0x12);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|2, apicid_8111, 0x13);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|3, apicid_8111, 0x10);
-
-	/* PCI Slot 2 */
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|0, apicid_8111, 0x12);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|1, apicid_8111, 0x13);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|2, apicid_8111, 0x10);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|3, apicid_8111, 0x11);
-
-	/* PCI Slot 3 */
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|0, apicid_8111, 0x11);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|1, apicid_8111, 0x12);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|2, apicid_8111, 0x13);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|3, apicid_8111, 0x10);
-
-	/* PCI Slot 4 */
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|0, apicid_8111, 0x12);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|1, apicid_8111, 0x13);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|2, apicid_8111, 0x10);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|3, apicid_8111, 0x11);
-
-	/* PCI Slot 5 */
-	// FIXME get the irqs right, it's just hacked to work for now
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|0, apicid_8111, 0x11);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|1, apicid_8111, 0x12);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|2, apicid_8111, 0x13);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|3, apicid_8111, 0x10);
-
-	/* PCI Slot 6 */
-	// FIXME get the irqs right, it's just hacked to work for now
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|0, apicid_8111, 0x10);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|1, apicid_8111, 0x11);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|2, apicid_8111, 0x12);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|3, apicid_8111, 0x13);
-
-	/* There is no extension information... */
-
-	/* Compute the checksums */
-	return mptable_finalize(mc);
-}
-
-static void reboot_if_hotswap(void)
-{
-	/* Hack patch work around for hot swap enable 33mhz problem */
-	device_t dev;
-	uint32_t data;
-	unsigned long htic;
-	int reset;
-
-	unsigned bus_chain_0 = node_link_to_bus(0, 0);
-
-	reset = 0;
-	printk(BIOS_DEBUG, "Looking for bad PCIX MHz input\n");
-	dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x02,0));
-	if (!dev)
-		printk(BIOS_DEBUG, "Couldn't find %02x:02.0\n", bus_chain_0);
-	else {
-		data = pci_read_config32(dev, 0xa0);
-		if(!(((data>>16)&0x03)==0x03)) {
-			reset=1;
-			printk(BIOS_DEBUG, "Bad PCIX MHz - Reset\n");
-		}
-	}
-	printk(BIOS_DEBUG, "Looking for bad Hot Swap Enable\n");
-	dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
-	if (!dev)
-		printk(BIOS_DEBUG, "Couldn't find %02x:01.0\n", bus_chain_0);
-	else {
-		data = pci_read_config32(dev, 0x48);
-		if(data & 0x0c) {
-			reset=1;
-			printk(BIOS_DEBUG, "Bad Hot Swap start - Reset\n");
-		}
-	}
-	if(reset) {
-		/* enable cf9 */
-		dev = dev_find_slot(node_link_to_bus(0, 0), PCI_DEVFN(0x04,3));
-		pci_write_config8(dev, 0x41, 0xf1);
-		/* reset */
-		dev = dev_find_slot(0, PCI_DEVFN(0x18,0));
-		htic = pci_read_config32(dev, HT_INIT_CONTROL);
-		htic &= ~HTIC_BIOSR_Detect;
-		pci_write_config32(dev, HT_INIT_CONTROL, htic);
-		outb(0x0e, 0x0cf9);
-	}
-	else {
-		printk(BIOS_DEBUG, "OK 133MHz & Hot Swap is off\n");
-	}
-}
-
-unsigned long write_smp_table(unsigned long addr)
-{
-	void *v;
-	reboot_if_hotswap();
-
-	v = smp_write_floating_table(addr, 0);
-	return (unsigned long)smp_write_config_table(v);
-}
diff --git a/src/mainboard/arima/hdama/romstage.c b/src/mainboard/arima/hdama/romstage.c
deleted file mode 100644
index d1e1c5fef0..0000000000
--- a/src/mainboard/arima/hdama/romstage.c
+++ /dev/null
@@ -1,122 +0,0 @@
-#include <stdint.h>
-#include <string.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <pc80/mc146818rtc.h>
-#include <console/console.h>
-#include <cpu/amd/model_fxx_rev.h>
-#include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "southbridge/amd/amd8111/early_smbus.c"
-#include <northbridge/amd/amdk8/raminit.h>
-#include <delay.h>
-#include "northbridge/amd/amdk8/reset_test.c"
-#include "northbridge/amd/amdk8/debug.c"
-#include <superio/nsc/pc87360/pc87360.h>
-#include <cpu/x86/bist.h>
-#include "northbridge/amd/amdk8/setup_resource_map.c"
-#include <spd.h>
-#include "southbridge/amd/amd8111/early_ctrl.c"
-
-#define SERIAL_DEV PNP_DEV(0x2e, PC87360_SP1)
-
-/*
- * GPIO28 of 8111 will control H0_MEMRESET_L
- * GPIO29 of 8111 will control H1_MEMRESET_L
- */
-static void memreset_setup(void)
-{
-	if (is_cpu_pre_c0()) {
-		/* Set the memreset low. */
-		outb((1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 28);
-		/* Ensure the BIOS has control of the memory lines. */
-		outb((1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 29);
-	} else {
-		/* Ensure the CPU has control of the memory lines. */
-		outb((1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 29);
-	}
-}
-
-static void memreset(int controllers, const struct mem_controller *ctrl)
-{
-	if (is_cpu_pre_c0()) {
-		udelay(800);
-		/* Set memreset high. */
-		outb((1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 28);
-		udelay(90);
-	}
-}
-
-static void activate_spd_rom(const struct mem_controller *ctrl) { }
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
-	return smbus_read_byte(device, address);
-}
-
-#include "northbridge/amd/amdk8/raminit.c"
-#include "northbridge/amd/amdk8/resourcemap.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
-#include "lib/generic_sdram.c"
-#include "cpu/amd/dualcore/dualcore.c"
-#include "cpu/amd/model_fxx/init_cpus.c"
-
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-	static const uint16_t spd_addr [] = {
-		DIMM0, DIMM2, 0, 0,
-		DIMM1, DIMM3, 0, 0,
-#if CONFIG_MAX_PHYSICAL_CPUS > 1
-		DIMM4, DIMM6, 0, 0,
-		DIMM5, DIMM7, 0, 0,
-#endif
-	};
-
-	int needs_reset;
-	unsigned bsp_apicid = 0, nodes;
-	struct mem_controller ctrl[8];
-
-	if (bist == 0)
-		bsp_apicid = init_cpus(cpu_init_detectedx);
-
-	pc87360_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-
-	/* Halt if there was a built in self test failure */
-	report_bist_failure(bist);
-
-	setup_default_resource_map();
-
-	needs_reset = setup_coherent_ht_domain();
-
-#if CONFIG_LOGICAL_CPUS
-	// It is said that we should start core1 after all core0 launched
-	start_other_cores();
-	wait_all_other_cores_started(bsp_apicid);
-#endif
-	/* This is needed to be able to call udelay().  It could be moved to
-	 * memreset_setup, since udelay is called in memreset. */
-	init_timer();
-
-	// automatically set that for you, but you might meet tight space
-	needs_reset |= ht_setup_chains_x();
-
-       	if (needs_reset) {
-		printk(BIOS_INFO, "ht reset -\n");
-	       	soft_reset();
-       	}
-
-	allow_all_aps_stop(bsp_apicid);
-
-	nodes = get_nodes();
-
-	fill_mem_ctrl(nodes, ctrl, spd_addr);
-
-	enable_smbus();
-
-	memreset_setup();
-
-	sdram_initialize(nodes, ctrl);
-
-	post_cache_as_ram();
-}