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| author | Tim Chen <Tim-Chen@quantatw.com> | 2017-01-20 11:23:44 +0800 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2017-01-22 19:26:22 +0100 |
| commit | 72353056852f5fec15763f2b8ab42e6931c354fb (patch) | |
| tree | 5745ad09b382ca846c9ab51333fceee813629f9f /src/mainboard/artecgroup/dbe61/mainboard.c | |
| parent | 949e34c3ee85524f5b0a27b72d3064752aa3d097 (diff) | |
| download | coreboot-72353056852f5fec15763f2b8ab42e6931c354fb.tar.xz | |
mainboard/google/reef: Increase TSR1 trigger point
Update the DPTF parameters based on thermal test result.
(ZHT_DPTF_EVT2_v0.4_20170120.xlsx)
1. Update DPTF TSR1 passive trigger point.
TSR1 passive point: 46
BUG=chrome-os-partner:60038
BRANCH=master
TEST=build and boot on electro dut
Change-Id: If35e4cf2dbf7c506534c52a052598f6204d5315a
Signed-off-by: Tim Chen <Tim-Chen@quantatw.com>
Reviewed-on: https://review.coreboot.org/18183
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/artecgroup/dbe61/mainboard.c')
0 files changed, 0 insertions, 0 deletions