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authorPatrick Georgi <patrick@georgi-clan.de>2010-11-20 10:31:00 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-11-20 10:31:00 +0000
commit9bd9a90d6a0a47ede6286e2c5599ae7335e4b96a (patch)
tree325b7b6abc1d4514d52ad1f726d9be4fa00d0454 /src/mainboard/artecgroup
parent622824cadbbbe003bc3e8c97694d2cf6bae0de9b (diff)
downloadcoreboot-9bd9a90d6a0a47ede6286e2c5599ae7335e4b96a.tar.xz
Unify DIMM SPD addressing. For Geode, change the
addressing scheme to match the rest of the tree (0x50 instead of 0xa0). abuild tested. Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/artecgroup')
-rw-r--r--src/mainboard/artecgroup/dbe61/romstage.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mainboard/artecgroup/dbe61/romstage.c b/src/mainboard/artecgroup/dbe61/romstage.c
index dc4e3ffe26..8303b15f49 100644
--- a/src/mainboard/artecgroup/dbe61/romstage.c
+++ b/src/mainboard/artecgroup/dbe61/romstage.c
@@ -32,13 +32,11 @@
#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
#include "spd_table.h"
+#include <spd.h>
#include "southbridge/amd/cs5536/cs5536_early_smbus.c"
#include "southbridge/amd/cs5536/cs5536_early_setup.c"
-#define DIMM0 0xA0
-#define DIMM1 0xA2
-
static int spd_read_byte(unsigned device, unsigned address)
{
int i;