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authorRonald G. Minnich <Ronald G. Minnich>2006-09-20 16:39:30 +0000
committerRonald G. Minnich <rminnich@gmail.com>2006-09-20 16:39:30 +0000
commit2ad85dbc65d884d82f2f9c9d4fa1c5cc3ab5dc42 (patch)
tree3e9c22d1649fc6946af295088723bb611c371fbb /src/mainboard/artecgroup
parente8bfbb387cc6fea5155d4b67e2b222af167e20bc (diff)
downloadcoreboot-2ad85dbc65d884d82f2f9c9d4fa1c5cc3ab5dc42.tar.xz
Lots of lx fixes. CLeanup mainly. THings now build
Signed-off-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2430 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/artecgroup')
-rw-r--r--src/mainboard/artecgroup/dbe61/Config.lb16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/mainboard/artecgroup/dbe61/Config.lb b/src/mainboard/artecgroup/dbe61/Config.lb
index 48e0fec450..94621eadaf 100644
--- a/src/mainboard/artecgroup/dbe61/Config.lb
+++ b/src/mainboard/artecgroup/dbe61/Config.lb
@@ -134,10 +134,10 @@ chip northbridge/amd/lx
device pci 1.0 on end # Host Bridge
- chip drivers/pci/realmode
- device pci 1.1 on end # VGA
- register "rom_address" = "0xfffc0000" # at the beginning of 256k
- end
+# chip drivers/pci/realmode
+# device pci 1.1 on end # VGA
+# register "rom_address" = "0xfffc0000" # at the beginning of 256k
+# end
device pci 1.2 off end # AES
chip southbridge/amd/cs5536_lx
@@ -184,10 +184,10 @@ chip northbridge/amd/lx
device pci f.6 off end # UDC controller
device pci f.7 off end # OTG controller
end
- chip drivers/pci/rtl8139
- device pci d.0 on end # Realtek LAN
- register "nic_irq" = "10"
- end
+# chip drivers/pci/rtl8139
+## device pci d.0 on end # Realtek LAN
+# register "nic_irq" = "10"
+# end
end
end